https://megous.com/dl/tmp/3add845b7e814de9.png https://megous.com/dl/tmp/3add845b7e814de9.png There are bunch of interrupt statuses around frame capture: RIS_F

https://megous.com/dl/tmp/3add845b7e814de9.png https://megous.com/dl/tmp/3add845b7e814de9.png There are bunch of interrupt statuses around frame capture: RIS_FRAME_IN, RIS_FRAME, RIS_V_START. Not sure why you'd decide to use V_START for deciding when the frame is in memory. VSYNC start is sent at the start of a frame and it's documented as just a interrupt that is directly triggered from the MIPI CSI sync signal in the datasheet. quote: "The incoming hsync and vsync control signals from the camera are connected to interrupt logic. It is possible to trigger on these signals for an event triggered configuration during processing."