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It's very clear he is talking about black boxes from the perspective of one trying to reverse one to fix pinephones isp...

by abxytg 4y ago

kop316 4y ago
Respectfully, the person you are responding to knows what he is talking about: https://xnux.eu/log/ https://xnux.eu/log/
- Roark66 4y ago
  So they write a bunch of drivers and stuff for pine phone. As a pine fan I thank them, but this doesn't mean we can't have a difference in opinion what does it mean for some component to be a black box. If you compare with some other manufacturer that gives us absolutely no docs, then yes having register level docs and user side source is really nice. But if you want to do something unconventional (like switch the whole damn thing off and bypass its latency) not knowing how it works internally is still a black box. For example there is an irq that fires when the first component of the isp(MI-memory interface) sees a vsync signal for a frame. We know it exists. We know how to enable/disable that irq. We can write code that does stuff when it fires. But what we don't know is is this vsync signal fired truly at the input of the ISP? It's output? Or perhaps between some specific components? It turns out that vsync fires not when the isp sees the very first vsync what the location of the registers suggests, but after all the processing is done at the output buffer (40ms later usually), but one wouldn't be able to tell without a lot of profiling. This amongst other things is what I call a black box. However, compare it with let's say a raspberry pi, and at register level the documentation is much better (for the isp).
  - megous 4y ago
    https://megous.com/dl/tmp/3add845b7e814de9.png https://megous.com/dl/tmp/3add845b7e814de9.png There are bunch of interrupt statuses around frame capture: RIS_FRAME_IN, RIS_FRAME, RIS_V_START. Not sure why you'd decide to use V_START for deciding when the frame is in memory. VSYNC start is sent at the start of a frame and it's documented as just a interrupt that is directly triggered from the MIPI CSI sync signal in the datasheet. quote: "The incoming hsync and vsync control signals from the camera are connected to interrupt logic. It is possible to trigger on these signals for an event triggered configuration during processing."
megous 4y ago
Parts of the ISP are blackboxes (debayer), other parts are quite trivial and documented in a bit more detail (gamma/degamma, BLC, color matrix transformation, etc.) and some parts are a bit of a mix. The documentation is spread over many PDFs, incl. from different venors who use the same ISP like NXP, who tend to document things in a bit more detail. So at worst, it's a gray box. ;)

It's very clear he is talking about black boxes from the perspective of one trying to reverse one to fix pinephones isp...

by abxytg 4y ago

It's very clear he is talking about black boxes from the perspective of one trying to reverse one to fix pinephones isp...

kop316 4y ago

Respectfully, the person you are responding to knows what he is talking about: https://xnux.eu/log/ https://xnux.eu/log/

Roark66 4y ago
So they write a bunch of drivers and stuff for pine phone. As a pine fan I thank them, but this doesn't mean we can't have a difference in opinion what does it mean for some component to be a black box. If you compare with some other manufacturer that gives us absolutely no docs, then yes having register level docs and user side source is really nice. But if you want to do something unconventional (like switch the whole damn thing off and bypass its latency) not knowing how it works internally is still a black box. For example there is an irq that fires when the first component of the isp(MI-memory interface) sees a vsync signal for a frame. We know it exists. We know how to enable/disable that irq. We can write code that does stuff when it fires. But what we don't know is is this vsync signal fired truly at the input of the ISP? It's output? Or perhaps between some specific components? It turns out that vsync fires not when the isp sees the very first vsync what the location of the registers suggests, but after all the processing is done at the output buffer (40ms later usually), but one wouldn't be able to tell without a lot of profiling. This amongst other things is what I call a black box. However, compare it with let's say a raspberry pi, and at register level the documentation is much better (for the isp).
- megous 4y ago
  https://megous.com/dl/tmp/3add845b7e814de9.png https://megous.com/dl/tmp/3add845b7e814de9.png There are bunch of interrupt statuses around frame capture: RIS_FRAME_IN, RIS_FRAME, RIS_V_START. Not sure why you'd decide to use V_START for deciding when the frame is in memory. VSYNC start is sent at the start of a frame and it's documented as just a interrupt that is directly triggered from the MIPI CSI sync signal in the datasheet. quote: "The incoming hsync and vsync control signals from the camera are connected to interrupt logic. It is possible to trigger on these signals for an event triggered configuration during processing."

megous 4y ago

Parts of the ISP are blackboxes (debayer), other parts are quite trivial and documented in a bit more detail (gamma/degamma, BLC, color matrix transformation, etc.) and some parts are a bit of a mix. The documentation is spread over many PDFs, incl. from different venors who use the same ISP like NXP, who tend to document things in a bit more detail. So at worst, it's a gray box. ;)