Modifying a 2s complement ALU so that if the overflow bit is set, then every bit of the result is set to 1 would be trivial. It's just another n OR gates, and

Modifying a 2s complement ALU so that if the overflow bit is set, then every bit of the result is set to 1 would be trivial. It's just another n OR gates, and those are pretty cheap (OK, you'd probably want an AND against a control bit, too). The author doesn't ignore that this would require a change at the hardware level - he says "Processor architectures will have to add a family of integer math instructions that properly propagate NaN values..." - and he is right that the change would not be a costly one.