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HN's obsession with RISC-V code density reminds me of the 1980's and the first heyday of RISC architectures (SPARC, MIPS, HP-PA, POWER, and later Alpha). End u
by therealcamino 4y ago
HN's obsession with RISC-V code density reminds me of the 1980's and the first heyday of RISC architectures (SPARC, MIPS, HP-PA, POWER, and later Alpha).
End users don't care at all about code density. If their application runs faster, that chip is what they'll want. (Compare a DECstation with a MIPS CPU to a VAXstation of the same era to get an idea.)
We don't have high-performance implementations of RISC-V yet, though, so these debates can go on and on. I'm looking forward to seeing actual high performance implementations from Tenstorrent and others, so there's something concrete to discuss.
- childintime 4y agoAll of the architectures you mention were targeted at high performance systems, not embedded systems. RISCV is the opposite. It is simple enough to implement yourself. Despite this, code density is comparable or better then existing options. This is a major design feat and not to be dismissed by calling this an obsession. Especially because code density ends up limiting the speed one can get out of a design, given a memory bandwidth bottleneck. So one might expect RISCV to outpace all other architectures once a neat set of extensions has been worked out. Indeed that needs a frustrating bit of time. However, you do sound like a self-righteous OpenSource "customer" who can only spitefully complain about a product that he didn't lift a finger to help deliver. That of course describes wrong doing, only somewhat understandable because we similarly inherited a world to live in, comparable to that open source product, and it isn't up to standard, if ever, and democracy doesn't allow us to make the changes we would like, to make it less of a bitch.
- therealcamino 4y agoI was not being critical of RISC-V, or dismissing it. I was saying that performance is the metric end users care about, and that HN commenters spend too much time arguing endlessly about the code density metric. I don't understand your final paragraph even a little bit. It's a bit odd.
- snvzz 4y agoCode density and performance go hand in hand. Higher code density means higher likeliness that performance-critical code will fit in L1$.
- therealcamino 4y agoCode density is one factor in a tremendously complex system. The entire design philosophy of RISC architectures for the last 35+ years is predicated on the notion that it's not the most important one, and shouldn't be focused on in isolation.
- snvzz 4y agoThe RISC paper was all about the need to strongly justify any complexity. I don't quite remember it even touching code density.
- therealcamino 4y agoFrom the abstract of the RISC-1 paper: "Although instructions are simpler, the average length of programs was found not to exceed programs for DEC VAX 11 by more than a factor of 2."
- znwu 4y agoChip and ISA are almost irrelevant stuff. No matter how you emphasize on end product performance, you cannot deny there SHOULD be a metric to compare ISA designs.