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By using names and references to those names. In the circuit modeling language I am working on the nodes in the graphs are components and the connections betwe
by lisper 4y ago
By using names and references to those names. In the circuit modeling language I am working on the nodes in the graphs are components and the connections between them are signals. Both are first-class entities. They all get assigned unique names which end up being fairly complicated but which you hardly ever have to refer to directly because you are almost always dealing with them at some level of abstract hierarchy where there is a simple name by which they can be referred and the rest of the true global name is implied. This allows you produce a complete description of a chip, i.e. a graph with billions of nodes, using text that is orders of magnitude smaller. And as a bonus you can automatically compile that text down to a physical layout that allows you to actually fabricate the chip.
There are graphical representations for the layout as well. But the text is primary.