We need sane open source fpga tool chains that can generalize building bitstreams for multiple vendor fpga's. As it stands the idea of programming them isn't th

We need sane open source fpga tool chains that can generalize building bitstreams for multiple vendor fpga's. As it stands the idea of programming them isn't that hard (well, to me), it's the damn tooling that is an ugly vendor created and maintained barrier to entry. I want a gcc or LLVM like compiler ecosystem that can handle multiple vendor backends and language front ends so we can use vhdl, verilog or a new hdl in a project. Let me write portable modularized logic files that let me abstract the underlying hardware so I can target different vendors and devices. Decouple layout and let the community create as many textual or graphical layout tools as needed. Then let me write a makefile to handle the build process. I don't want to worry about switching gigabytes of tooling so I can move from a Xilinx to Lattice or Microchip FPGA or SoC. These tools will be a boon to devs using those awesome FPGA SoC's as you can self-host the toolchain on the SoC itself. I did a bunch of fpga self learning around 2012 and spent a lot of time fighting with getting ISE to run on Linux. I then tried Altera and then fought with fought with Quartus (though from memory I think it was easier to setup). Then ISE was replaced by vivaldo and I felt discouraged by having to adopt a new IDE contraption with more licensing woes. Then my hard drive died and I've never bothered with wrestling fpgas since. The two fpga boards, a Digilent Nexus 3 and Terasic de0 nano collect dust. I gave up because the tools sucked and i wasnt using them to make money.