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> The biggest problem is not support for the instruction set in the silicon, but the performance penalty it brings. Why is that sentence present tense instead
by coder543 4y ago
> The biggest problem is not support for the instruction set in the silicon, but the performance penalty it brings.
Why is that sentence present tense instead of past tense? I suppose it continues to be a problem for Intel, but your comment appears to be presenting Intel downsides as if they were universal. Zen 4 apparently implements AVX-512 efficiently, without the problems Intel implementations experienced. That's what this whole discussion is about, and that's what Phoronix found as well.[0]
Hopefully Intel will catch up to AMD on AVX-512, but in the mean time, people optimizing software should be aware that AVX-512 has few (if any) downsides on certain platforms. Phoronix found zero performance penalty, but perhaps more testing is required.
[0]: https://www.phoronix.com/review/amd-zen4-avx512/6 https://www.phoronix.com/review/amd-zen4-avx512/6
- ComputerGuru 4y agoBecause it's hard to say "conditionally enable AVX-512 only on platforms supporting it BUT not on platforms where it actually brings performance penalties."
- janwas 4y agoCan you give a real example of AVX-512 actually causing a net performance penalty on any CPU? The only way I can see that happening is using AVX-512 in small, infrequently called functions such as strcmp, and the solution is: don't do that. If proper SIMD code runs for say 1ms at a time, it's pretty much guaranteed to benefit from any implementation of AVX-512.