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I recall that back in the 90s, besides higher clock speeds, one of the greatest reasons for excitement about a new CPU was instruction set extensions (MMX, 3DNo
by cesarb 4y ago
I recall that back in the 90s, besides higher clock speeds, one of the greatest reasons for excitement about a new CPU was instruction set extensions (MMX, 3DNow, etc), which could give outsized performance gains when software was updated to work with them. This latest release from AMD has similar cause for excitement: AVX-512 is more than just larger vectors, it also doubles the number of registers, adds per-lane mask registers, and other enhancements; unlike with Intel processors, there should be no worry of slowing down the clock for the whole processor when using these instructions with larger vectors, and unlike with Intel, we can reasonably expect that every AMD processor from now on will always have these instructions enabled.
- Scene_Cast2 4y agoI'm personally curious about AVX512 support in pyTorch and numpy. Numpy depends on BLAS libraries for performance, and I don't know how much dev resources are behind openBLAS (i.e. how soon I can expect performance increases), especially given that AMD is a much smaller company and doesn't spend as much as Intel on software.
- michaellarabel 4y agoMany AVX-512 Zen 4 benchmarks here - https://www.phoronix.com/review/amd-zen4-avx512 https://www.phoronix.com/review/amd-zen4-avx512
- timeu 4y agoInterestingly even software (oneDNN) that is using Intel's brand new OneAPI is running excellent one Zen 4 CPUs, often faster than on Intel's own CPUs: https://www.phoronix.com/review/amd-ryzen-7900x-7950x-linux/16 https://www.phoronix.com/review/amd-ryzen-7900x-7950x-linux/...
- devwastaken 4y agoCache sizes are also significant in these gens. The 5800x3D outperforms the 12900KS in many games. They just stuck a bunch of cache onto the 5800.
- AshamedCaptain 4y agoThere was an article about the positive impact large integrated caches had back when Intel was doing it: https://www.anandtech.com/show/16195/a-broadwell-retrospective-review-in-2020-is-edram-still-worth-it https://www.anandtech.com/show/16195/a-broadwell-retrospecti... I'm surprised Intel has basically abandoned the idea, and AMD just markets it for "gaming".
- didgetmaster 4y agoAny rumors that any of the Zen4 chips will get a 3D cache version?
- cestith 4y agoThere are those rumors. In fact, there's no announced 7800X yet. The speculation is they launch a 7800X3D a few weeks to a few months from now with 3D cache from the beginning in that 7800 name space. To me that seems likely. There's a rather more optimistic rumor that all the 7000 series will eventually have 3D cache versions, which I find maybe too optimistic.
- ac29 4y agoNo need for rumours, AMD already said they will be bringing out 7000 series chips with V-cache. This was during a investor presentation, the specific products haven't been announced yet.
- beebeepka 4y agoUnspecified 3d cache models have been confirmed. Coming end of this year, Q1 2023 at the latest. Checking out the numbers for these non-3d models, the large cache SKUs are going to be pretty amazing. Likely expensive too
- doikor 4y ago> Unspecified 3d cache models have been confirmed. Coming end of this year, Q1 2023 at the latest. Most speculation/leaks point to CES (early January) would be the announcement so not this year.
- fomine3 4y ago> unlike with Intel processors, there should be no worry of slowing down the clock for the whole processor when using these instructions with larger vectors because they don't implement "true" 512bit registers for AVX-512. This is basically to support instruction set rather than SIMD performance boost.
- doikor 4y agoThey do still get around 60% speedup up according to phoronix https://www.phoronix.com/review/amd-zen4-avx512/6 https://www.phoronix.com/review/amd-zen4-avx512/6 > On average for the tested AVX-512 workloads, making use of the AVX-512 instructions led to around 59% higher performance compared to when artificially limiting the Ryzen 9 7950X to AVX2 / no-AVX512.
- fomine3 4y agoWow it looks great than expected.
- adrian_b 4y agoActually, Zen 4 implements true 512-bit registers. See the other thread on HN, which points to https://www.mersenneforum.org/showthread.php?p=614191 https://www.mersenneforum.org/showthread.php?p=614191 It appears that Zen 4 implements around 192 registers of 512 bits. However, the latest Intel model (Sapphire Rapids) implements more 512-bit registers, around 332 such registers. For most operations, Zen 4 has the same execution units as Zen 3, it has not expanded them to 512 bits, but the execution units of Zen 3 are enough to match the 512-bit throughput of the Intel CPUs. The only exception is that Zen 4 can do one 512-bit FMA and one 512-bit FADD per cycle, while the most expensive of the server and workstation Intel CPUs have a second 512-bit FMA unit, so they can do 1 FMA + 1 FMA, instead of 1 FMA + 1 FADD. The cheaper Intel CPUs with AVX-512 are worse than Zen 4, because they can do only 1 FMA, not also an FADD, like Zen 4. On the other hand Zen 4 implements a true 512-bit shuffle unit, while the current Intel CPUs have only 256-bit shuffle units, slowing down the shuffles that must cross the register halves. As tested at that link, while there are a few cases when Zen 4 has slower implementations for some 512-bit instructions, in many cases the AVX-512 implementation in Zen 4 is better than in the current Intel CPUs.
- Salgat 4y agoMeanwhile Intel is disabling AVX on their CPUs that use efficiency cores.