Sure, but RISC vs CISC is at heart just a design trade off. Once you've decided (or been forced by pragmatisim) to go with a "simple but fast" instruction set t

Sure, but RISC vs CISC is at heart just a design trade off. Once you've decided (or been forced by pragmatisim) to go with a "simple but fast" instruction set then design choices like large register set and load-store architecture (to keep instruction set small and orthogonal) are all obvious choices, and don't need to have come from some rulebook of RISC design principles. All I'm saying is that I heard at the time that the well-liked 6502 was a source of inspiration for the design (and someone else has noted Hermann also remembering something similar), notwithstanding that there was no doubt much borrowing from the contemporary (UC Berkeley, Stanford) RISC designs as well. As a 6502 programmer the utility of zero page variables is pretty obvious and there is a parallel there to a large register bank.. Maybe the 6502 wasn't "RISC like" in sense of incorporating what would become RISC design principles (it was too primitive for that), but it certainly validated a KISS design approach, just as contemporary next-gen CISC designs did nothing in Acorn's eyes to sell that approach. Back at that time we were all just seeing/discovering what was possible, and I'd have to guess that the ARM instruction set was more pragmatic than dogmatic - a combination of what seemed desireable, appeared reasonable to implement, and performed well in simulation.