4 ms·
Most likely the optimizations are higher level than that (for the most part). With the switch they will be able to target to specific core counts and use a less
by midnightclubbed 4y ago
Most likely the optimizations are higher level than that (for the most part).
With the switch they will be able to target to specific core counts and use a less generic thread/memory synchronization api.
There may be some cases where the fixed ARMv8 instruction set allows them to use instructions that have equivalents on recent x64 processors but not back to their minspec PC.