4 ms·
That's no different from ARM, though.
by colejohnson66 4y ago
That's no different from ARM, though.
- brucehoult 4y agoWell ... no. ARM has a ton of mutually-incompatible ISAs. You can't take assembly language or binary code between them AT ALL. Forget extensions -- just the basic instructions are incompatible. ARM are still today selling cores that run the original 1980s A32 instruction set plus 16 bit Thumb. You can find them, for example, in the Raspberry Pi A, A+, B, B+, Zero, Zero W, and Compute Module 1. Then there are cores that run only the 16 bit Thumb ISA plus a handful of extra instructions (because Thumb was not originally designed to be the only ISA on a CPU): Cortex-M0+ as in Pi Pico Then there are cores that only run Thumb2: Cortex-M3/M4/M7 Then there are cores that only run A64: Cortex A34, A65, A510, A715, everything from Apple since the iPhone 8, Cavium, probably Nuvia. RISC-V has only two variants: 32 bit and 64 bit. And actually almost all the instruction mnemonics and binary opcodes are the same between them. The only difference is the size of the registers. With a little care you can run 32 bit RISC-V code on a 64 bit CPU, not in a special mode but just sticking to the top and/or bottom 2 GB of address space. You can easily write assembly language code that runs on both 32 bit and 64 bit. It is easy to use the same compiler for both.
- deleted 4y ago[deleted]