4 ms·

What does RISC-V do computationally better than the current ARM variants?

by jjtheblunt 4y ago

sanxiyn 4y ago
None yet. There is RISC-V vector extension, which is certainly different, but whether it is better is unclear for now.
- legulere 4y ago
  Arm has something a bit similar with scalable vector extension (SVE)
zik 4y ago
It's an open architecture designed for extensibility. So if you're wanting to make an AI processor for instance it's much easier to add an AI extension to RISC-V than it is to ARM. And you don't have to pay ARM license fees either.
legulere 4y ago
RISC-V has better code density with its compressed instructions.
- farseer 4y ago
  Yes but ARM processors are more powerful for now. They are also better designed compared to the RISC-V models currently available in the market. RISC-V can't yet take on ARM v8 or v9.
  - brucehoult 4y ago
    ARMv7 (32 bit) has slightly better code density than RISC-V 32 bit, although that will change with the next crop of RISC-V extensions (and already did to a certain extent with the B extension). ARMv8/v9 (by which I'm sure you mean A64 / Aarch64) is where RISC-V has the big code density advantage. And RISC-V right now has proven cores in mass-production up to the A55 level, with A72 level (e.g. Pi 4) having been around on developer boards for a year and hitting mass-production at around the end of this year. A76-level RISC-V will be demonstrated on a developer board within the next six weeks or so, and available to developers first half of next year. That's Intel "Horse Creek"(using SiFive P550 cores), and also there is something called "Dubhe" coming out of China which I think is related but they don't like to say so. M1-level RISC-V is on the drawing boards, probably out in 2025. RISC-V is behind, but can already take on a significant part of the ARMv8/v9 market.
    - snvzz 4y ago
      >ARMv7 (32 bit) has slightly better code density than RISC-V 32 bit Specifically, thumb2 does. I'm sure it won't last. AIUI, with B and the current Zc, RISC-V is already ahead, and still has room to improve until it is ratified.
kinafab 4y ago
RISC-V is free. ARM is not. Free beats non-free.
jabl 4y ago
The 'innovation' in RISC-V is not the ISA itself, which in many ways is a pretty standard conservative RISC, although one that by virtue of being later to the game has avoided many historical missteps like delay slots or register windows. The 'innovation' is the licensing, or business, model. Anyone can design a RISC-V core and license it to others, or just give it away for free under an open source license on github, no need to negotiate with the ISA owner to buy some kind of architectural license.
rwmj 4y ago
Nothing, but that's not what's important. RISC-V is permissionless. You can grab an open source core (or design your own, but that's a lot more work) and go into production without paying a cent in licensing fees or negotiating any legal agreements.

What does RISC-V do computationally better than the current ARM variants?

sanxiyn 4y ago

None yet. There is RISC-V vector extension, which is certainly different, but whether it is better is unclear for now.

legulere 4y ago
Arm has something a bit similar with scalable vector extension (SVE)

zik 4y ago

It's an open architecture designed for extensibility. So if you're wanting to make an AI processor for instance it's much easier to add an AI extension to RISC-V than it is to ARM. And you don't have to pay ARM license fees either.

legulere 4y ago

RISC-V has better code density with its compressed instructions.

farseer 4y ago
Yes but ARM processors are more powerful for now. They are also better designed compared to the RISC-V models currently available in the market. RISC-V can't yet take on ARM v8 or v9.
- brucehoult 4y ago
  ARMv7 (32 bit) has slightly better code density than RISC-V 32 bit, although that will change with the next crop of RISC-V extensions (and already did to a certain extent with the B extension). ARMv8/v9 (by which I'm sure you mean A64 / Aarch64) is where RISC-V has the big code density advantage. And RISC-V right now has proven cores in mass-production up to the A55 level, with A72 level (e.g. Pi 4) having been around on developer boards for a year and hitting mass-production at around the end of this year. A76-level RISC-V will be demonstrated on a developer board within the next six weeks or so, and available to developers first half of next year. That's Intel "Horse Creek"(using SiFive P550 cores), and also there is something called "Dubhe" coming out of China which I think is related but they don't like to say so. M1-level RISC-V is on the drawing boards, probably out in 2025. RISC-V is behind, but can already take on a significant part of the ARMv8/v9 market.
  - snvzz 4y ago
    >ARMv7 (32 bit) has slightly better code density than RISC-V 32 bit Specifically, thumb2 does. I'm sure it won't last. AIUI, with B and the current Zc, RISC-V is already ahead, and still has room to improve until it is ratified.

kinafab 4y ago

RISC-V is free. ARM is not. Free beats non-free.

jabl 4y ago

The 'innovation' in RISC-V is not the ISA itself, which in many ways is a pretty standard conservative RISC, although one that by virtue of being later to the game has avoided many historical missteps like delay slots or register windows. The 'innovation' is the licensing, or business, model. Anyone can design a RISC-V core and license it to others, or just give it away for free under an open source license on github, no need to negotiate with the ISA owner to buy some kind of architectural license.

rwmj 4y ago

Nothing, but that's not what's important. RISC-V is permissionless. You can grab an open source core (or design your own, but that's a lot more work) and go into production without paying a cent in licensing fees or negotiating any legal agreements.