4 ms·
> avoids requiring a mask when chasing pointers This, unfortunately, is an artificial limitation; negative nans may correspond to canonical addresses, but most
by moonchild 4y ago
> avoids requiring a mask when chasing pointers
This, unfortunately, is an artificial limitation; negative nans may correspond to canonical addresses, but most oses won't let you map negative memory, keeping it all to themselves.
- repiret 4y agoIt’s not even always architecturally possible - ARMv8 doesn’t support user-space mappings with bit 63 set, for example.
- moonchild 4y agoI see. I was talking specifically about x86 here (and the conventions of mainstream OSes hosted on it); obviously, every platform is unique. It looks like on arm, the high bit of an address is used as a special marker to indicate which translation table should be used to look up the rest of the address. I am no arm expert, but looking at the documentation at [0], it does not seem like allowing 'userspace' access to addresses mapped in TTBR1 would be an insurmountable challenge. 0. https://developer.arm.com/documentation/ddi0406/b/System-Level-Architecture/Virtual-Memory-System-Architecture--VMSA-/CP15-registers-for-a-VMSA-implementation/CP15-c2--Translation-table-support-registers https://developer.arm.com/documentation/ddi0406/b/System-Lev...
- mmoskal 4y agoThe way it works is that pointers are represented as themselves, assuming top 15 bits being zero. Doubles are shifted by an offset such that nans land at top 15 bits being zero. So assuming pointers are at most 49 bits you're fine.
- moonchild 4y agoMy point is that, if the system were more cooperative, you would not need to 'shift by an offset'.