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I think we're going to see major shakeups over the next ~10 years from both companies. Old models of design are quickly reaching their limits. Heterogeneous cor
by Night_Thastus 4y ago
I think we're going to see major shakeups over the next ~10 years from both companies. Old models of design are quickly reaching their limits. Heterogeneous cores and multi-die designs are just the start. It's an exciting time!
- throwaway0x7E6 4y agoreaching the performance limit would be a blessing in disguise
- NoToP 4y agoFactoring in say 10x-100x repetition code for for error correction, existing silicon tech is already damn near to the launder limit. General purpose CPU and GPU architecture has some data flow logistics it could optimize, but ASICs are pretty much at the performance limit already.