The molecularity of the RISC-V architecture is going to be very appealing for embedded roles like this. That flexibility can be a liability for, say, a desktop

The molecularity of the RISC-V architecture is going to be very appealing for embedded roles like this. That flexibility can be a liability for, say, a desktop operating system but if you've got an embedded system like a space probe where you develop the hardware and software in parallel it means that you can only pay for what you use in terms of ISA features. Need 64 bit memory addressing to handle all the RAM on your graphics card but don't need the chip to have an MMU? You can do that within the RISC-V spec but not within POWER. And with RISC-V there are ways to add your own specialized instructions for your particular use case. If I were designing an open source processing for a laptop or cell phone I'd use the POWER ISA. But for a space probe I'd certainly go with RISC-V.