3 ms·
I wonder if it would make sense for the processor to scope these settings to stack frames, and clear them when the appropriate ret happens. Somewhere on this p
by twic 4y ago
I wonder if it would make sense for the processor to scope these settings to stack frames, and clear them when the appropriate ret happens.
Somewhere on this page there's a discussion of dirty upper half states in Intel vector instructions, and something similar might help there.