neat :) Love seeing other people building new and weird architectures. I wonder what their actual use case for SMT was, I don't really buy the "one thread for v

neat :) Love seeing other people building new and weird architectures. I wonder what their actual use case for SMT was, I don't really buy the "one thread for vector, one thread for pulling data into SRAM". I'm also a bit surprised to see they didn't go for a VLIW ISA, it always seemed like these tightly integrated data processing chips were the ideal candidates since binary compatibility isn't an issue when you're building your own HW.