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This is a pattern I am glad to see fade-away: lower TDP chips. Because you can just tell a modern chip to use however much power you'd like and it'll do GREAT!
by rektide 4y ago
This is a pattern I am glad to see fade-away: lower TDP chips. Because you can just tell a modern chip to use however much power you'd like and it'll do GREAT! This has confused a lot of people who think low power is impossible! There is some silicon lottery, there is some difference in chips - some lower power, some higher power, but it's been increasingly faint & the justification for having separate chips has mostly gone away. We don't need lower power bin chips anymore: just set the power-point lower on the chip you have! That alone is great. If you want to get fancy, you can undervolt to drop idle some, restrict your max clocks, and it'll sip even less power.
This was a fairly memory-intensive task, but Matthew Dillon of DragonflyBSD writing up the Ryzen 2700X[1] he got in 2018 keeps coming to mind:
> I Enable XFR2, then set the PPT, TDC, and EDC limits. Set TDC and EDC high enough so they don't get in the way, then limit power consumption by adjusting PPT. By using the PPT limit instead of manually setting the CPU frequency, the motherboard gets the best of both worlds... it will idle just as low as it did before, it will still run one or two cores at full speed (~4.1 GHz), and it will ratchet down the frequency when all cores are loaded. Using a PPT limit with XFR2 is far, far superior to using manual OC frequency settings for the CPU.
> With standard XFR enabled in auto mode the 2700X will pull around 180W at the wall at full load. This might be useful if I had DDR4 3000 memory in it, but I don't, so there's no real need to pull that much power at full load. I was able to reduce this all the way down to 85W at full load without really impacting a concurrent -j 32 nativekernel NO_MODULES=TRUE test compile.
I really look forward to seeing how people throttle-down & get ultra-efficient 8c 7700X's with this new generation. (Especially now that the CCX die went from 12 -> 7nm.)
[1] https://lists.dragonflybsd.org/pipermail/users/2018-September/357883.html https://lists.dragonflybsd.org/pipermail/users/2018-Septembe...