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I wish AMD would add more cache for faster speed and lower energy consumption Ryzen 5xxx L1 32/32, L2 512, L3 32768 Ryzen 7xxx L1 32/32, L2 1024, L3

I wish AMD would add more cache for faster speed and lower energy consumption Ryzen 5xxx L1 32/32, L2 512, L3 32768 Ryzen 7xxx L1 32/32, L2 1024, L3 65536 M2 L1 192/128, L2 16384, SL 8192 M1 Ultra L1 192/128, L2 49152, SL 98304 [edit: see comment about latency cache comparison below]

loeg 4y ago
> I wish AMD would add more cache for faster speed and lower energy consumption Ryzen 5xxxX3D: 96 MB of L3? https://www.anandtech.com/show/17337/the-amd-ryzen-7-5800x3d-review-96-mb-of-l3-3d-v-cache-designed-for-gamers https://www.anandtech.com/show/17337/the-amd-ryzen-7-5800x3d...
- KingOfCoders 4y ago
  Yes, which boosted performance, and I think the X3D is not on the die, so easier to increase.
  - loeg 4y ago
    Probably also worth noting that the M1 Ultra is a 20C CPU so the cache per core ratio on 5800X3D (8C) is much higher despite similar total L3.
pizza234 4y ago
They did that with the 5800X3D; the results were overall positive, although uneven. The cost was significant though - around 100$ more than the 5800X (which was $350).
- sundvor 4y ago
  Where it really mattered, the results are staggering. E.g. Star Citizen, with everything depending on its rather complex entity streaming. There, the 96MB of cache which I believe is for the 5800X3D's single CCD blows all other CPUs out of the water.
jsheard 4y ago
They are going to, AMD confirmed that Zen4 3D is the next release after regular Zen4 Like the 5800X3D it will use 3D stacking to squeeze more cache into the same die area
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giyanani 4y ago
Those numbers aren’t directly comparable — caches usually trade off size for performance, and Apple’s L1 sits in performance somewhere between Ryzen’s L1 and L2. Ditto for Apple’s L2 versus Ryzen’s L2 and L3. I can’t remember the exact article I read that in, but it’s pretty obvious when looking at Anandtech’s latency charts. M1 latency: https://www.anandtech.com/show/17024/apple-m1-max-performance-review/2 https://www.anandtech.com/show/17024/apple-m1-max-performanc... Ryzen latency: https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-dive-review-5950x-5900x-5800x-and-5700x-tested/5 https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-di...
- KingOfCoders 4y ago
  Thanks! To anyone else looking at the graphs, beware they are logarithmic.
ajross 4y ago
There are tradeoffs there. Bigger caches mean larger areas, which means longer wires and more complicated clocking. The M1 tops out a little over 3 GHz, vs. 5 GHz for Intel chips and almost 6 for these new Zen 4 parts.[1] Apple then bets that they can make it up with wider execution units, which seems to have worked out for them (it also explains why boring/unoptimized scalar logic in amateur tests aren't meeting the numbers seen from benchmarks and HPC tests). But it's not about "cache" per se, it's a different design. You need to do a lot more than just increase cache area to duplicate Apple's design choices. [1] A big part of that is, of course, the architecture's genesis as a phone processor. Everyone loves to talk about how efficient the M1/2 are, but the truth is the CPU is a comparatively small part of the energy budget on devices with 5-10W displays. If you were designing a priori for a laptop, you wouldn't necessarily be as power-constrained in your design as the M chips.
- KingOfCoders 4y ago
  Raptor Lake increases L1 cache size and nearly doubles L2 cache size from Alder Lake (then again double the size of Ryzen).
cesarb 4y ago
> I wish AMD would add more cache for faster speed and lower energy consumption There's a trade-off: a bigger cache means a higher latency. According to https://twitter.com/chiakokhua/status/1564413952108335105 https://twitter.com/chiakokhua/status/1564413952108335105 this doubling of the L2 cache already caused an increase of 2 cycles of latency. > Ryzen L1 32/32 > M1/M2 L1 192/128 This is a consequence of Apple using a 16kiB page size, while the x86 world is stuck with a 4kiB page size. For technical reasons (the L1 lookup runs before or in parallel with the virtual to physical address translation), the L1 cache can only be indexed by the bits which don't change between virtual and physical addresses (that is, the bits representing the offset within the page), making it hard to increase the L1 cache size while keeping its latency low (and a low latency is very important in the L1 cache). I don't know the latency for the Apple L2 caches, but it wouldn't surprise me if it's higher than the latency for the Intel and AMD L2 caches; having a larger L1 cache would mean Apple can afford to have a higher latency to the L2.
- deleted 4y ago
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loeg 4y ago

> I wish AMD would add more cache for faster speed and lower energy consumption Ryzen 5xxxX3D: 96 MB of L3? https://www.anandtech.com/show/17337/the-amd-ryzen-7-5800x3d-review-96-mb-of-l3-3d-v-cache-designed-for-gamers https://www.anandtech.com/show/17337/the-amd-ryzen-7-5800x3d...

KingOfCoders 4y ago
Yes, which boosted performance, and I think the X3D is not on the die, so easier to increase.
- loeg 4y ago
  Probably also worth noting that the M1 Ultra is a 20C CPU so the cache per core ratio on 5800X3D (8C) is much higher despite similar total L3.

pizza234 4y ago

They did that with the 5800X3D; the results were overall positive, although uneven. The cost was significant though - around 100$ more than the 5800X (which was $350).

sundvor 4y ago
Where it really mattered, the results are staggering. E.g. Star Citizen, with everything depending on its rather complex entity streaming. There, the 96MB of cache which I believe is for the 5800X3D's single CCD blows all other CPUs out of the water.

jsheard 4y ago

They are going to, AMD confirmed that Zen4 3D is the next release after regular Zen4 Like the 5800X3D it will use 3D stacking to squeeze more cache into the same die area

deleted 4y ago

[deleted]

giyanani 4y ago

Those numbers aren’t directly comparable — caches usually trade off size for performance, and Apple’s L1 sits in performance somewhere between Ryzen’s L1 and L2. Ditto for Apple’s L2 versus Ryzen’s L2 and L3. I can’t remember the exact article I read that in, but it’s pretty obvious when looking at Anandtech’s latency charts. M1 latency: https://www.anandtech.com/show/17024/apple-m1-max-performance-review/2 https://www.anandtech.com/show/17024/apple-m1-max-performanc... Ryzen latency: https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-dive-review-5950x-5900x-5800x-and-5700x-tested/5 https://www.anandtech.com/show/16214/amd-zen-3-ryzen-deep-di...

KingOfCoders 4y ago
Thanks! To anyone else looking at the graphs, beware they are logarithmic.

ajross 4y ago

There are tradeoffs there. Bigger caches mean larger areas, which means longer wires and more complicated clocking. The M1 tops out a little over 3 GHz, vs. 5 GHz for Intel chips and almost 6 for these new Zen 4 parts.[1] Apple then bets that they can make it up with wider execution units, which seems to have worked out for them (it also explains why boring/unoptimized scalar logic in amateur tests aren't meeting the numbers seen from benchmarks and HPC tests). But it's not about "cache" per se, it's a different design. You need to do a lot more than just increase cache area to duplicate Apple's design choices. [1] A big part of that is, of course, the architecture's genesis as a phone processor. Everyone loves to talk about how efficient the M1/2 are, but the truth is the CPU is a comparatively small part of the energy budget on devices with 5-10W displays. If you were designing a priori for a laptop, you wouldn't necessarily be as power-constrained in your design as the M chips.

KingOfCoders 4y ago
Raptor Lake increases L1 cache size and nearly doubles L2 cache size from Alder Lake (then again double the size of Ryzen).

cesarb 4y ago

> I wish AMD would add more cache for faster speed and lower energy consumption There's a trade-off: a bigger cache means a higher latency. According to https://twitter.com/chiakokhua/status/1564413952108335105 https://twitter.com/chiakokhua/status/1564413952108335105 this doubling of the L2 cache already caused an increase of 2 cycles of latency. > Ryzen L1 32/32 > M1/M2 L1 192/128 This is a consequence of Apple using a 16kiB page size, while the x86 world is stuck with a 4kiB page size. For technical reasons (the L1 lookup runs before or in parallel with the virtual to physical address translation), the L1 cache can only be indexed by the bits which don't change between virtual and physical addresses (that is, the bits representing the offset within the page), making it hard to increase the L1 cache size while keeping its latency low (and a low latency is very important in the L1 cache). I don't know the latency for the Apple L2 caches, but it wouldn't surprise me if it's higher than the latency for the Intel and AMD L2 caches; having a larger L1 cache would mean Apple can afford to have a higher latency to the L2.

deleted 4y ago
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