> The article notes some advantages of being able to use different processes for different wafers, but there's not much more on that. It might be helpful if you

> The article notes some advantages of being able to use different processes for different wafers, but there's not much more on that. It might be helpful if you wanted different fabs for memory and compute, or for flash type memory. Anyone know what they're getting at here? Well, one advantage is that it can be a cost/efficiency savings on a few levels. For example, in the case of Zen2/3, the main CPU chiplet is at 7nm, but the I/O die is at 12nm. If I had to guess, generally speaking it is useful in cases where parts of the final module would benefit from higher transistor density versus others; Memory controller tech generally gets fewer updates than the CPU/APU itself, so it allows faster design cycles; you already know the existing I/O controller works, one less portion to re-qualify.