Perhaps the bigger deal here is the loss of Dennard scaling in the 2000s. This is due to heat density at any given point on the chip. After all, increased trans

Perhaps the bigger deal here is the loss of Dennard scaling in the 2000s. This is due to heat density at any given point on the chip. After all, increased transistor density could lead you to using all those transistors, but the thermal conductivity of all the materials involved isn't changing much, so there's a natural limit to the electrically active transistor density. You're welcome to increase transistor density, so long as you keep the number of active transistors roughly constant (not quite true since smaller transistors produce less heat). You could keep transistor density fixed, but still double the number of transistors in a chip ... by using bigger chips. And that is naturally more expensive because they are more likely to be defective and require more sophisticated packaging. 3D stacking of smaller chips is another approach, since we usually only talk about the 2D area of a chip. This requires more advanced packaging, but substantially increases the likelihood of building a functional device. The loss of Dennard scaling makes it more interesting to investigate ASICs because CPUs won't necessarily eat your lunch in two years. And circuit cleverness is one contributor to Moore's Law that Moore talked about in his 1975 address. So Moore's Law is in some ways dead (number of instantaneously useful transistors is NOT doubling every two years) and other ways alive (useful work is improving rapidly so long as you can decompose your workload into leaning on the accelerators like YouTube did), depending on how you measure it.