Cool! I’d love to hear more about the node design process, it seems as though presumably the blocks of transistors are already combined into chip Lego and each

Cool! I’d love to hear more about the node design process, it seems as though presumably the blocks of transistors are already combined into chip Lego and each of these uses interference patterns to etch things that are smaller than would be possible otherwise? We must be hitting the theoretical limit in a few generations right?