3 ms·

But didn't you intellectually know that this would be the implication of Moore's law if it could actually hold over such a long period? Maybe it's more a manife

• ChuckMcM 4y ago
  To be fair I took way too much math to be comfortable in my college days but when at Intel everyone (even Gordon) knew that "Moore's Law" wasn't a "law" (like the Law of Gravity) it was an observation on the current state of the art. As a result everyone made the assumption that semiconductor scaling was an S curve and we happened to be in the exponential part of that curve but it would taper off. And everyone in the design engineering team felt it would taper off way sooner than it has!
  • aswanson 4y ago
    Was it common knowledge back then that CMOS would eventually deprecate TTL, ECL, etc?
    • ChuckMcM 4y ago
      Yes. Process changes, transistor geometry, dielectric materials, were all things that people expected to change. That customers would stop using TTL was pretty avant-garde, but when ASICS became "affordable" (basically custom chips for non-chip companies) it was obvious that volume manufacturers would condense a bunch of TTL into a single package just for cost reasons. But fundamentally electrons and 'charge' are quantum in nature and even in the 80's if you're transistors were "too close" you could get electron tunneling between them. So I, and others, assumed there was a really hard limit on how small you could go (and it was likely above 100nm rather than below it). And of course now hardly anyone used old 90nm tech, I think 40nm is the current "jelly bean" process but I freely admit I've not looked at the geometries used in the vast Chinese IC market of "support" chips.