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One of the interesting things you can do with LLVM is bully it into emitting a SPIR-V compute shader, supposedly for GPUs, but I think you can probably throw it
by mhh__ 4y ago
One of the interesting things you can do with LLVM is bully it into emitting a SPIR-V compute shader, supposedly for GPUs, but I think you can probably throw it into a very contrived SYCL ugly-ugly-ugly pipeline and somehow get it on an FPGA.
https://dlang.org/blog/2017/07/17/dcompute-gpgpu-with-native-d-for-opencl-and-cuda/ https://dlang.org/blog/2017/07/17/dcompute-gpgpu-with-native... With DCompute you can use metaprogramming to generate shaders alongside D code for GPUs, really want to try it with an FPGA. Similar things probably exist for rust as well.
Getting the data back off the FPGA into the program is undefined behaviour, though.
- jcranmer 4y ago> but I think you can probably throw it into a very contrived SYCL ugly-ugly-ugly pipeline and somehow get it on an FPGA. It's not a "very contrived SYCL ugly-ugly-ugly pipeline"--Intel's oneAPI explicitly has a FPGA backend for its SYCL compiler: https://www.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/programming-interface/fpga-flow.html https://www.intel.com/content/www/us/en/develop/documentatio...
- mhh__ 4y agoYou've still got to take that and make it do what you want. I also find oneAPI kind of ugly although it was a while since I really dug into it.
- misnome 4y agoThe FPGA tooling is pretty nice, once you get past the "how did this work for anyone else bugs". Albeit with limited card support and I haven't seen others jumping onto the bandwagon. As far as I can tell it's mostly just "SYCL with feature limitations" and a couple of niceties to connect kernels together. I've wondered how much work it would be to get Rust->SPIR-V->OneAPI compiling, but it sounds like an exercise in masochism so haven't gone down that route yet.
- mhh__ 4y agoWith work like this it becomes clear (even in GPU-land) why picking the right components and sticking with them (where sensible) is so much more important in hardware than software. In software we want nice abstractions and so on, with FPGAs if those abstractions are even possible you probably can't afford to write them. I spoke to an ASIC designer recently, the EDA industries weird. The big thing with SYCL and oneAPI and so on for me at least is that you have all this stuff bolted onto C++. C++'s ability to do generative programming is just not as good as it's competitors, that and C++ just being a bad language. If things are more language-agnostic than I realize then yippee The clever thing about the DCompute project that I linked above is that it uses a simple but powerful introspection system (provided by D, could really be any competently designed language) to pick up the right stuff and generative the compute kernels in the background for you.
- nicwilson 4y agoIntels FPGAs should be able to run OpenCL kernel SPIR-V which simplifies the pipeline significantly.