Think more of a re-encoding than a full re-architecture. Every existing 16/32/64 bit instruction should receive some place in that re-encoded opcode map, inclu

Think more of a re-encoding than a full re-architecture. Every existing 16/32/64 bit instruction should receive some place in that re-encoded opcode map, including abominations as aaa. But e.g the whole prefix thing should go away. The processor's predecode stage should cease existing. Let's roughly sketch a proposal, even if many variants are possible Instructions start on 64 bit boundarys. If the highest bit is 0 you have an insn else a constant. So the whole thing becomes self-synchronizing. You're now of course missing 1 bit, that should get a place in the encoding of a constant. This means you have 62 bits left. Presuming the prefixes like segment regs get solved, you could encode 2 instructions in there, 1 of them a nop if you need the constant. Do away with short encodings for ax. Try and avoid double encodings uf reg + modrm combos exist. Above all, resist the temptation to mess with the instruction set, just re encode.