Cavium dropped Arm32 support in 2014: "Only the 64-bit AArch64 execution state is support. No 32-bit AArch32 support" https://en.wikichip.org/wiki/cavium/thunde

Cavium dropped Arm32 support in 2014: "Only the 64-bit AArch64 execution state is support. No 32-bit AArch32 support" https://en.wikichip.org/wiki/cavium/thunderx https://en.wikichip.org/wiki/cavium/thunderx Qualcomm dropped Arm32 in Falkor, which shipped in 2017: "AArch64 only" https://en.wikichip.org/wiki/qualcomm/microarchitectures/falkor https://en.wikichip.org/wiki/qualcomm/microarchitectures/fal... Arm64 is really a wild and radical departure from Arm32, they're night-and-day different which is why dumping 32-bit support is attractive. Compare this with x86 where you have a microcode backdoor^H^H^Hengine to smooth over the differences, or POWER64/MIPS64 which built off of very clean 32-bit designs and stayed true to them. And of course RISC-V is the non-trademark-infringing name for MIPS-VI.