3 ms·
Done. The HP 3000 "Classic" hardware had 2 to 8 16-bit words of top-of-stack registers. There was only one CPU, so CPU-level coherence wasn't an issue. There we
by mgsouth 4y ago
Done. The HP 3000 "Classic" hardware had 2 to 8 16-bit words of top-of-stack registers. There was only one CPU, so CPU-level coherence wasn't an issue. There were memory caches and sometimes multiple ALUs, that was handled by the microcode pipeline logic. I imagine DMA required some bus snooping.
The "hot" area of the stack didn't need to be very deep. Most code loaded a word or two on the stack from some locations in memory, maybe re-used a word on the stack, ran an op which pushed a word back on the stack, and then the result was read or popped & stored back in general memory. Sometimes you'd DUP one of the operands. If you're familiar with HP RPN calculators, it was a lot like that. The HP-41 and -42, for example, only have 4 words for the whole stack.