4 ms·
I assume part of the problem is the physical distance from the CPU hard limiting speed due to the speed of light. 3d stacking of memory might enable a design wi
by p1necone 4y ago
I assume part of the problem is the physical distance from the CPU hard limiting speed due to the speed of light. 3d stacking of memory might enable a design with a large enough stack close enough to the CPU? I don't really know what I'm talking about though.
- kaba0 4y agoAs mentioned before, a circular buffer with the last items moved to main memory could work (and was apparently already done on several CPUs). You have basically n registers, if it gets full you just override the last (which could have already been saved to ram out of order). Repeated popping can reintroduce these back.