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Using paging/virtual memory is not a requirement for an OS, even when all currently popular OSes make use of it. Intel CPUs before the 80286 did not have an MM
by blueflow 4y ago
Using paging/virtual memory is not a requirement for an OS, even when all currently popular OSes make use of it.
Intel CPUs before the 80286 did not have an MMU, either.
- anyfoo 4y agoDid they even call it an MMU already? The 286 only had segmentation, which arguably is just an addressing mode. It introduced descriptors that had to be resolved, but that happened when selecting the descriptor (i.e. when loading the segment register), where a hidden base, limit, and permission "cache" was updated. Unlike paging, where things are resolved when accessing memory.
- actionfromafar 4y agoI don't know what to call it, but Minix on 286 had protection between processes. (Each process had its own 64k instruction + 64k data, IIRC.) So effectively the same result as an MMU. But Minix is the only OS I know of which used this mode.
- anyfoo 4y agoYes, that's segmentation. And I was just wondering if you could call that an MMU. It's not the same result as an MMU across the board, since you have no paging: You cannot freely rearrange pages in virtual memory with their frames in physical memory, you can only "segment" linear portions of physical memory. You also cannot fault in pages on-demand at their time of being accessed, only when the whole segment is loaded (i.e. the selector written into the segment register). If an MMU is something that sits between memory and the rest of the CPU, and abstracts physical addressing away, then I argue the 286 did not have an MMU. Segmented access is more of a mandatory addressing mode, where you always access relatively to a segment's base, and have to keep within the limit. OS/2 is another OS that made use of pre-paging 286 protected mode.
- nineteen999 4y agoWikipedia refers to it as having on-chip MMU "capabilities", albeit only supporting segmentation and not paging: "The 286 was the first of the x86 CPU family to support protected virtual-address mode, commonly called "protected mode". In addition, it was the first commercially available microprocessor with on-chip MMU capabilities (systems using the contemporaneous Motorola 68010 and NS320xx could be equipped with an optional MMU controller). This would allow IBM compatibles to have advanced multitasking OSes for the first time and compete in the Unix-dominated[citation needed] server/workstation market."
- anyfoo 4y agoThanks, but I don't think I would call what the 286 had "virtual-address mode". Intel themselves referred to "virtual addresses" only in the context of paging in their 386 manual. Addresses relative to segmentation were called "logical addresses", and they translate to "linear addresses". That Wikipedia passage seems to be inaccurate, or a least not use the common terminology.
- rep_lodsb 4y agoIntel did you use that term to describe segmented addressing, at least in the 286 manual [1]: ""In Protected Virtual Address Mode, the 80286 provides an advanced architecture that retains substantial compatibility with the 8086 and other processors in the 8086 family."" ""In Protected Mode, application programs deal exclusively with virtual addresses; programs have no access whatsoever to the actual physical addresses generated by the processor. As discussed in Chapter 2, an address is specified by a program in terms of two components: (1) a 16-bit effective address offset that determines the displacement, in bytes, of a location within a segment; and (2) a 16-bit segment selector that uniquely references a particular segment."" [1] https://ragestorm.net/downloads/286intel.txt https://ragestorm.net/downloads/286intel.txt
- anyfoo 4y agoYou're right, I searched wrong in my 386 manual. So apparently they did call it virtual addressing. I'm still not sure if I like calling that an "MMU". To me, an MMU acts on every memory access. But at the end of the day, who cares what I think what words mean. :) The critical distinction to me is that segmentation is not much more than, effectively, an indexed addressing mode, where the base is the segment base that has been loaded into the descriptor cache when the segment register was loaded. Nothing happens at the time of actually accessing memory, except for the limit check.