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So I learned about the "hidden" x86 mode called XuCode (https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/secure-c
by tenebrisalietum 4y ago
So I learned about the "hidden" x86 mode called XuCode (https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/secure-coding/xucode-implementing-complex-instruction-flows.html https://www.intel.com/content/www/us/en/developer/articles/t...) - which is x86 binary code placed into RAM by the microcode and then "called" by the microcode for certain instructions - particularly SGX ones if I'm remembering correctly.
Wild speculative guess: It's entirely possible some of the pre-AMD64 stuff is actually internally used by modern Intel and AMD CPUs to implement complex instructions.
- kmeisthax 4y agoOh boy, we've gone all the way back to Transmeta Code Morphing Software. What "ring" does this live on now? Ring -4? :P Jokes aside, I doubt XuCode would use pre-AMD64 stuff; microcode is lower-level than that. The pre-AMD64 stuff is already handled with sequences of microcode operations because it's not really useful for modern applications[0]. It's entirely possible for microcode to implement other instructions too, and that's what XuCode is doing[1]. The real jank is probably hiding in early boot and SMM, because you need to both jump to modern execution modes for client or server machines and downgrade to BIOS compatibility for all those industrial deployments that want to run ancient software and OSes on modern machines. [0] The last time I heard someone even talk about x86 segmentation, it was as part of enforcing the Native Client inner sandbox. [1] Hell, there's no particular reason why you can't have a dual-mode CPU with separate decoders for ARM and x86 ISAs. As far as I'm aware, however, such a thing does not exist... though evidently at one point AMD was intending on shipping Ryzen CPUs with ARM decoders in them.