> why not allow the ISA to query[1] if an L1 access is currently viable Well that's interesting. Query/branch on whether some address is presently in a given c

> why not allow the ISA to query[1] if an L1 access is currently viable Well that's interesting. Query/branch on whether some address is presently in a given cache line, with more fun if one can test whether whether that line is exclusive/shared etc. The hardware definitely knows that, though the information may be stale immediately after providing it. Selling that to the hardware guys would mean finding a compelling use case. I expect modifying the cache coherency implementation is done reluctantly. I can't think of one where whether a single line is resident is worth branching on, and querying whether N are present doesn't really fit the ISA model. Further up the stack though, whether a given page is currently in memory (as opposed to swapped out) is a similar sort of thing, where one might want to prefetch it while doing other work. That might not be worth a syscall though. So I love the suggestion but can't see the return on the silicon investment.