Yeah. The trick on the 386/486 is that the visible segment registers are only part of the actual registers. When you load a segment register, relevant data (bas

Yeah. The trick on the 386/486 is that the visible segment registers are only part of the actual registers. When you load a segment register, relevant data (base, limit, as far as I recall) from the descriptors get loaded into the invisible part (so a sort of "descriptor cache"). The "trick" was just to load the segment registers with a selector pointing to a descriptor with a large segment, and then just go back to real mode without immediately reloading the segment registers, as Intel very careful prescribes in their manual. The CPU would still use the unchanged hidden part of the registers for addressing. As soon as you load another value, that gets replaced with a real mode conformant 64k limit.