3 ms·
On 286, yeah, 386/486 and later use a different sequence involving messing with segment descriptors and their limits in the 32-bit GDT. For reference, this fil
by winocm 4y ago
On 286, yeah, 386/486 and later use a different sequence involving messing with segment descriptors and their limits in the 32-bit GDT.
For reference, this file contains a canonical instruction sequence for entering and returning from big real mode:
https://github.com/tianocore/edk2/blob/master/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm https://github.com/tianocore/edk2/blob/master/MdePkg/Library...
(x86_64 version: https://github.com/tianocore/edk2/blob/master/MdePkg/Library/BaseLib/X64/Thunk16.nasm https://github.com/tianocore/edk2/blob/master/MdePkg/Library...)
- anyfoo 4y agoYeah. The trick on the 386/486 is that the visible segment registers are only part of the actual registers. When you load a segment register, relevant data (base, limit, as far as I recall) from the descriptors get loaded into the invisible part (so a sort of "descriptor cache"). The "trick" was just to load the segment registers with a selector pointing to a descriptor with a large segment, and then just go back to real mode without immediately reloading the segment registers, as Intel very careful prescribes in their manual. The CPU would still use the unchanged hidden part of the registers for addressing. As soon as you load another value, that gets replaced with a real mode conformant 64k limit.