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This wouldn't actually help in common workloads, because the instructions that already exist are typically better than what you can achieve with microcode. The
by Tuna-Fish 4y ago
This wouldn't actually help in common workloads, because the instructions that already exist are typically better than what you can achieve with microcode.
The reason for the RISC revolution was the understanding that there are fairly strict limits of what you can achieve in a single instruction if you want your cpu to be fast. An instruction that does some complex task that you need done is not really going to be any faster than composing the same action out of RISC instructions because, thanks to pipelining, the limiting factor on the speed of your cpu is going to be the actual work anyway.
Microcode on modern x86 cpus is typically slower (takes longer to output uops, outputs less per clock than the uop cache) than simple instructions, and only exists for legacy and doing some complex operations (like context switches) where being uninterruptible and having a bit of extra scratch space is useful.
- actionfromafar 4y agoIt makes sense what you say, but I still have doubts. Are you saying that not all x86 instructions are implemented in microcode? And wouldn't shader language be a perfect target for custom microcode, etc.
- cesarb 4y ago> Are you saying that not all x86 instructions are implemented in microcode? If you look at discussions about the instruction decoder of Intel processors, you often see it mentioned that they have something like three "simple" decoders and one "complex" decoder. The main difference is that the "complex" decoder is the only one which can decode instructions implemented in microcode (dispatching micro-operations from the microcode ROM), while the "simple" decoders can only output micro-operations directly (using something similar to hard-wired pattern matching on the instruction). So yes, many x86 instructions are not implemented in microcode.
- mhh__ 4y agoThe term microcode has become muddled in that you have microcode for implementing highly complex instructions and "microcode" as-in an internal target that X86 instructions are translated into.
- nine_k 4y agoCould one add the AES-NI instruction to Intel CPUs that lacked it using purely microcode? Would it be a speedup compared to encoding one round of AES using regular instructions?