This is not correct. First, process node names were the same as the minimum transistor gate length, not 2X. Second, at least down to 28nm, this relationship hel

This is not correct. First, process node names were the same as the minimum transistor gate length, not 2X. Second, at least down to 28nm, this relationship held true. It may have also been the case for 22nm. It all went out the window with finfet processes.