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> …but, make doesn’t scale; What about these projects? https://github.com/redis/redis/blob/unstable/src/Makefile https://github.com/redis/redis/blob/unstable/

by sjaak 4y ago

> …but, make doesn’t scale; What about these projects? https://github.com/redis/redis/blob/unstable/src/Makefile https://github.com/redis/redis/blob/unstable/src/Makefile https://github.com/torvalds/linux/blob/master/Makefile https://github.com/torvalds/linux/blob/master/Makefile

wokwokwok 4y ago
Yes, I can also write a big Makefile to hand compile my project; I can also compile it using shell script that explicitly executes the build steps. …but I dont, not because it’s impossible to do but because the effort in maintaining those is high. Come on, are you serious? Hand crafted makefiles? Have you actually tried to maintain one of those? That redis makefile has a explicitly coded set of object files. Can you imagine trying to maintain that for opencv? I’m just too damn lazy to waste my time maintaining that kind of stuff; it’s a pointless, thankless task… but hey, I’ll give it to you; there are people out there who prefer to do it that way. I posit, they spend more time maintaining their build system then they would prefer, but they keep make for ideological reasons, not practical ones.
p_l 4y ago
Are you aware that the first step in building linux kernel is literally bootstrapping a custom build system that just happens to generate makefiles (if not just "mostly make compatible" files - I got crosseyed recently trying to find if kbuild didn't try to run them as well) Linux kernel provides "makefile" as interface for you, but it's mostly compiled from a custom KBuild system.
- cesarb 4y ago
  AFAIK, the makefile fragment generated by kconfig is nothing more than a set of CONFIG_FOO=y (or =m) statements; everything else is done directly in the makefiles, which have declarations similar to "obj-$(CONFIG_FOO) += foo.o" which become obj-y or obj-m (and so on) depending on the value set by that makefile fragment generated by kconfig. The set of object files to build can then be found in "$(obj-y)" (and so on), which is used as a dependency in a makefile rule to link everything together. The same kconfig also creates a C header file with #define rules for these same CONFIG_ symbols, which is passed to the compiler through a "-include" argument. It's not "mostly compiled from a custom KBuild system", IIRC kbuild is the name given to the whole system, including the makefile rules and macros which do the actual compilation.
  - p_l 4y ago
    Decided to go into the source again, and yes, it's mostly implemented in Makefiles, but they are wildly different from the kind of makefile discussed in the article, with considerable amount of machinery in macros and external C programs (whole "features" thing) to the point that individual makefiles in subdird probably wouldn't parse right if not executed through kbuild wrapper

by sjaak 4y ago

wokwokwok 4y ago

Yes, I can also write a big Makefile to hand compile my project; I can also compile it using shell script that explicitly executes the build steps. …but I dont, not because it’s impossible to do but because the effort in maintaining those is high. Come on, are you serious? Hand crafted makefiles? Have you actually tried to maintain one of those? That redis makefile has a explicitly coded set of object files. Can you imagine trying to maintain that for opencv? I’m just too damn lazy to waste my time maintaining that kind of stuff; it’s a pointless, thankless task… but hey, I’ll give it to you; there are people out there who prefer to do it that way. I posit, they spend more time maintaining their build system then they would prefer, but they keep make for ideological reasons, not practical ones.

p_l 4y ago

Are you aware that the first step in building linux kernel is literally bootstrapping a custom build system that just happens to generate makefiles (if not just "mostly make compatible" files - I got crosseyed recently trying to find if kbuild didn't try to run them as well) Linux kernel provides "makefile" as interface for you, but it's mostly compiled from a custom KBuild system.

cesarb 4y ago
AFAIK, the makefile fragment generated by kconfig is nothing more than a set of CONFIG_FOO=y (or =m) statements; everything else is done directly in the makefiles, which have declarations similar to "obj-$(CONFIG_FOO) += foo.o" which become obj-y or obj-m (and so on) depending on the value set by that makefile fragment generated by kconfig. The set of object files to build can then be found in "$(obj-y)" (and so on), which is used as a dependency in a makefile rule to link everything together. The same kconfig also creates a C header file with #define rules for these same CONFIG_ symbols, which is passed to the compiler through a "-include" argument. It's not "mostly compiled from a custom KBuild system", IIRC kbuild is the name given to the whole system, including the makefile rules and macros which do the actual compilation.
- p_l 4y ago
  Decided to go into the source again, and yes, it's mostly implemented in Makefiles, but they are wildly different from the kind of makefile discussed in the article, with considerable amount of machinery in macros and external C programs (whole "features" thing) to the point that individual makefiles in subdird probably wouldn't parse right if not executed through kbuild wrapper