From a much better Anandtech article: 32% increase in layers, 40% increase in die area. https://www.anandtech.com/show/17509/microns-232-layer-nand-now-shippin

From a much better Anandtech article: 32% increase in layers, 40% increase in die area. https://www.anandtech.com/show/17509/microns-232-layer-nand-now-shipping https://www.anandtech.com/show/17509/microns-232-layer-nand-... A bunch of the cost is test and packaging which is constant so there will be a small cost per bit reduction. But the new chip will cost significantly more to manufacture than a 512Gbit device. No free lunch.