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Compute Express Link

hardware2win 4y ago
I do kinda work with it (specification) The mem coherency concept is cool Seems like in next years we can expect progress in volatile mem sizes in compare to last 10-15 years of 8/16 GBs
peter_d_sherman 4y ago
Why might Compute Express Link be necessary? Well, I like to think about a future computer -- one where the connection between the computer's CPU and its RAM -- might be as open, flexible, modular, proxyable, non-proprietary, and debugable -- as USB is today... perhaps CXL is one of the technologies that can make that happen... Perhaps detachable optical fiber interconnects between future CPU's and future RAM would be another such technology... Related: https://www.computeexpresslink.org/ https://www.computeexpresslink.org/
- adrian_b 4y ago
  In general there are 2 important applications where CXL is expected to be useful. One is for servers with many terabytes of DRAM, where it can be convenient to have separate boards or boxes for CPUs and memories, for various reasons, e.g. for more flexible maintenance and upgrading, or to enable a reconfigurable allocation of the memory modules to CPUs, to be able to vary the ratio between available memory and CPU cores, for different applications. The second application is to have accelerators, e.g. GPUs, which have local caches that are coherent with the CPU caches, exactly like the CPU caches in a multi-socket system are coherent. Both Intel and AMD have kept secret the protocol used between sockets in multi-socket boards, so any other vendors, like NVIDIA, could not use that for their products. To solve the problem of the cache coherency, a lot of other proprietary protocols have been developed, but to allow interoperability, during the last years there have been several standardization initiatives. Intel has realized that being left outside, with their own proprietary protocol, incompatible with all future accelerators, would not be good, as it could push people to switch from Intel servers to other vendors, so they have generated their own proposal and then it seems that they have succeeded to convince everybody else that it is better to join forces and develop a unified standard based on CXL. Having detached memory, connected via CXL, will never be useful for a personal computer or for a small server, due to increased access latency. On the other hand, having a second socket with CXL, or one or more CXL slots instead of PCIe slots, can be interesting also in desktop computers, to be able to use GPUs or other accelerators, which will share the installed memory with the main CPU, and which will include coherent cache memories. This could simplify programming for discrete GPUs, which could be seen exactly like the integrated GPUs, as sharing a unified memory with the CPU.
  - yjftsjthsd-h 4y ago
    So we have finally arrived at reinventing mainframes built out of commodity components, and this is the link between those components.

I do kinda work with it (specification) The mem coherency concept is cool Seems like in next years we can expect progress in volatile mem sizes in compare to last 10-15 years of 8/16 GBs

peter_d_sherman 4y ago

Why might Compute Express Link be necessary? Well, I like to think about a future computer -- one where the connection between the computer's CPU and its RAM -- might be as open, flexible, modular, proxyable, non-proprietary, and debugable -- as USB is today... perhaps CXL is one of the technologies that can make that happen... Perhaps detachable optical fiber interconnects between future CPU's and future RAM would be another such technology... Related: https://www.computeexpresslink.org/ https://www.computeexpresslink.org/

adrian_b 4y ago
In general there are 2 important applications where CXL is expected to be useful. One is for servers with many terabytes of DRAM, where it can be convenient to have separate boards or boxes for CPUs and memories, for various reasons, e.g. for more flexible maintenance and upgrading, or to enable a reconfigurable allocation of the memory modules to CPUs, to be able to vary the ratio between available memory and CPU cores, for different applications. The second application is to have accelerators, e.g. GPUs, which have local caches that are coherent with the CPU caches, exactly like the CPU caches in a multi-socket system are coherent. Both Intel and AMD have kept secret the protocol used between sockets in multi-socket boards, so any other vendors, like NVIDIA, could not use that for their products. To solve the problem of the cache coherency, a lot of other proprietary protocols have been developed, but to allow interoperability, during the last years there have been several standardization initiatives. Intel has realized that being left outside, with their own proprietary protocol, incompatible with all future accelerators, would not be good, as it could push people to switch from Intel servers to other vendors, so they have generated their own proposal and then it seems that they have succeeded to convince everybody else that it is better to join forces and develop a unified standard based on CXL. Having detached memory, connected via CXL, will never be useful for a personal computer or for a small server, due to increased access latency. On the other hand, having a second socket with CXL, or one or more CXL slots instead of PCIe slots, can be interesting also in desktop computers, to be able to use GPUs or other accelerators, which will share the installed memory with the main CPU, and which will include coherent cache memories. This could simplify programming for discrete GPUs, which could be seen exactly like the integrated GPUs, as sharing a unified memory with the CPU.
- yjftsjthsd-h 4y ago
  So we have finally arrived at reinventing mainframes built out of commodity components, and this is the link between those components.