There is presently no jtag debugger support for S2 chip (due to xtensa not wanting their IP to be public/open sourced by espressif who only licensed the ip for

There is presently no jtag debugger support for S2 chip (due to xtensa not wanting their IP to be public/open sourced by espressif who only licensed the ip for internal use) The jtag interface needs to be reverse engineered. You can target the s2 and flash it using cargo. However if you are building something complex and want to use Probe-rs you will probably want to buy a c3 module. Also you can emulate and test the riscv in qemu. (useful for integration testing on cloud) Rust for embedded is awesome and doesn't get enough attention for how powerful the potential is.