Actually _most_ hardware architectures has support for read/write barriers, it's just that the technique is patented. :( Also fully agreeing on the GC/non-GC m

Actually _most_ hardware architectures has support for read/write barriers, it's just that the technique is patented. :( Also fully agreeing on the GC/non-GC mixing being underexplored, however outside of compiler analysis optimizations this would require language support and the intersection of people who would be interested in this mix doesn't seem that large.