For reactive programming, verilog does that as its primary function. You can write imperative code as well. But it is a very primitive language that doesn't eve

For reactive programming, verilog does that as its primary function. You can write imperative code as well. But it is a very primitive language that doesn't even support structures and loads of historical cruft. Systemverilog improves on it greatly. VHDL is contemporaneous with verilog and is much more principled because it was modeled on ADA. I have never heard of anyone using verilog for anything other than modeling logic.