4 ms·
And those bytes matter when most Intel CPU cores have only a few dozen KB of L1I cache. Interestingly, the M1 and M2 performance cores have a whopping 192KB of
by gary_0 4y ago
And those bytes matter when most Intel CPU cores have only a few dozen KB of L1I cache. Interestingly, the M1 and M2 performance cores have a whopping 192KB of L1 instruction cache.
- kaba0 4y agoIsn’t it in part due to business reasons, namely that Apple is not a CPU vendor, it doesn’t have to turn a profit on chips so it can allow much larger die sizes and thus larger cache sizes as well. Is there something inherent in ARM here I’m missing?
- pclmulqdq 4y agoARM instructions aren't as compact as their x86 counterparts, so they need a big cache to get similar performance on cache-bound applications.
- gary_0 4y agoAFAIK, AArch64 instructions are roughly 2x longer than x64's average, but that's 3x as much cache as a comparable Intel core.
- hajile 4y agoARM aarch64 instructions are around 12-15% bigger overall, but cache sizes are much larger than that. Most likely that is so they can power the massive reorder buffer and deal with having code for tons of branches handy.