4 ms·

Possibly more common is when the company is bought specifically to shut it down, because the product's success would hurt, or is hurting, sales of their own pro

by ncmncm 4y ago

Possibly more common is when the company is bought specifically to shut it down, because the product's success would hurt, or is hurting, sales of their own product. There used to be a category of software called "electronic design automation". It presented an interactive editor where you could enter the schematic diagram of an integrated circuit, and also enter a chip layout, and it would ensure that they matched. It was big business. But "silicon compilers" that needed only the schematic, and generated the chip layout, threatened that business. So, in the mid-to-late '80s the biggest EDA company set about buying up early-stage silicon compiler companies and shutting them down. That was doomed, but bought them several years during which silicon compilers were (therefore) not available for people to use. The company is still in business today, but sells very different things. General Motors bought up more carmakers to, effectively, shut down than probably any other. Sometimes a company can be bought for less than it would cost to hire as many staff as they have. So, they are bought and shut down, and the employees are put to work on various other projects. Google's hiring system is so Byzantine that buying companies, bypassing it, might be their main recruiting method. One might even buy a company because its product has a name they want to use for their own product. The momentary importance of domain names in the late '90s caused a fair bit of that. None of these contradict one another. A company might be bought for any or all reasons at the same time. So when your company is bought, expecting its product to come out the other side is naïve.

lizknope 4y ago
I'm curious which companies you are talking about? I design semiconductors and I use EDA software everyday. I know Cadence was formed from a merger in 1988 and they have since bought around 30 other EDA companies. https://en.wikipedia.org/wiki/Cadence_Design_Systems https://en.wikipedia.org/wiki/Cadence_Design_Systems
- ncmncm 4y ago
  Back then the big EDA outfits were Mentor Graphics, Daisy, and Valid. ECAD became Cadence, embraced silicon compilers, and ate everybody's lunch. Back then, chips were still laid out by pasting up prepared logic blocks, gates, and occasional custom transistors, and routing metal traces between them, all on what we would today call a low-resolution workstation monitor. A million transistors was a lot. These would be output via a plotter to make photomasks for the various doping, glass, and and metal layers. The EDA software of the time, besides supporting manual editing editing of layouts and schematics, would simulate whole chips taking into account capacitance of wires and transistor inputs, propagation delay, and drive capability of output transistors. It would also apply geometric checks to make sure the layout conformed to rules of the target process. Where violated, somebody would need to redraw that bit, which might mean moving stuff out of the way. Somebody would have to make up sequences of values to feed to inputs, and others to check outputs against. So the period when MG was buying and shuttering silicon compiler startups was '85 to '89. I think after Cadence won, Mentor Graphics got more involved in supporting embedded system design and firmware integration, leaving chips to others. Daisy merged with Cadnetix and went bust in 1990, and after twists and turns what was left became part of Mentor Graphics in 1999. Valid was folded into Cadence in 1991. Cadence tried and failed to buy MG in 2008. MG was finally bought by Siemens AG in 2016.
  - lizknope 4y ago
    I started working in 1997 doing digital physical design. I had never heard the term "silicon compiler" before so I looked it up. https://en.wikipedia.org/wiki/Silicon_compiler https://en.wikipedia.org/wiki/Silicon_compiler Silicon compilation takes place in three major steps: Convert a hardware-description language such as Verilog or VHDL into logic (typically in the form of a "netlist"). Place equivalent logic gates on the IC. Silicon compilers typically use standard-cell libraries so that they do not have to worry about the actual integrated-circuit layout and can focus on the placement. Routing the standard cells together to form the desired logic. So this is basically what I do everyday but we just call it logic synthesis (Synopsys Design Compiler / Cadence Genus) and Place and Route in Cadence Innovus or Synopsys IC Compiler. We use Mentor Calibre for LVS/DRC. I've worked in serdes teams where there is a lot of custom analog design with manually sized transistors and custom layout in Virtuoso. I'm working on chips in 5nm that are over 20x20mm so it would be impossible to do those without all the automation and it is still tons of manual work. Some of my older coworkers told me about doing layout on transparencies and colored pencils in the early 1980's.
    - ncmncm 4y ago
      I have been out of that world for 30 years. The terminology has stabilized since, and the software has got overwhelmingly more sophisticated, and also (I hear) comically buggy. Comically if you are not obliged to rely on it. Maybe tragically, otherwise, with no expectation of improvement. Some of us remember Rubylith with conflicted fondness.
jka 4y ago
I wonder whether there has ever been an attempt to calculate the loss-in-value caused by acquisition-as-shutdown-mechanism. They probably frequently lead to competitive benefits (and increased market share / revenue) for the acquirer, but the discontinuation of products presumably leads to lost time, effort, and potentially money as the former customers of the product look for alternatives (in a diminished market). I'll beat my usual drum and mention that free and open source software can mitigate some of the risks (but not, for example, support availability) for a software-based product, similar to having an agreed source-code escrow provision with a vendor.
- dahart 4y ago
  > open source software can mitigate some of the risks Have you seen this work in practice, do you have any examples to share? It’s hard to take seriously at face value for two reasons: 1- generally speaking it might undermine the acquisition in the first place since acquirers and investors and boards tend to like private potentially patentable IP, or at the very least proprietary code. 2- More importantly using your software after an acquisition-as-shutdown to compete with the acquirer is almost certainly a recipe for legal trouble. This seems unlikely to get that far since the acquiring co probably would have vetted the software and also had the acquiree sign a non-compete. Either way, if the intent was to shutdown the software, and if the acquiree was paid for their business, there isn’t a good way to “mitigate the risks”, the deed is already done. If you want to avoid the risk of shutdown, don’t take the deal. When you do see open source software as having any ability to change that equation?
  - jka 4y ago
    Sure - ZFS[1] is one example that springs to mind. Those acquirer-side incentives do seem rational (and to some extent traditional) in a business sense. The risk-mitigation I mentioned was from the perspective of users, not so much of the acquisition target (although it could reassure their employees to know that the time and effort they invested continues to provide value). [1] - https://en.wikipedia.org/wiki/ZFS https://en.wikipedia.org/wiki/ZFS
  - carapace 4y ago
anticensor 4y ago
> Google's hiring system is so Byzantine that buying companies, bypassing it, might be their main recruiting method. Wrong. Google actually fires all former employees of acquired companies once a certain protection period in the acquisition agreement is over, unless they individually pass the tests applied to new employees.

by ncmncm 4y ago

lizknope 4y ago

I'm curious which companies you are talking about? I design semiconductors and I use EDA software everyday. I know Cadence was formed from a merger in 1988 and they have since bought around 30 other EDA companies. https://en.wikipedia.org/wiki/Cadence_Design_Systems https://en.wikipedia.org/wiki/Cadence_Design_Systems

ncmncm 4y ago
Back then the big EDA outfits were Mentor Graphics, Daisy, and Valid. ECAD became Cadence, embraced silicon compilers, and ate everybody's lunch. Back then, chips were still laid out by pasting up prepared logic blocks, gates, and occasional custom transistors, and routing metal traces between them, all on what we would today call a low-resolution workstation monitor. A million transistors was a lot. These would be output via a plotter to make photomasks for the various doping, glass, and and metal layers. The EDA software of the time, besides supporting manual editing editing of layouts and schematics, would simulate whole chips taking into account capacitance of wires and transistor inputs, propagation delay, and drive capability of output transistors. It would also apply geometric checks to make sure the layout conformed to rules of the target process. Where violated, somebody would need to redraw that bit, which might mean moving stuff out of the way. Somebody would have to make up sequences of values to feed to inputs, and others to check outputs against. So the period when MG was buying and shuttering silicon compiler startups was '85 to '89. I think after Cadence won, Mentor Graphics got more involved in supporting embedded system design and firmware integration, leaving chips to others. Daisy merged with Cadnetix and went bust in 1990, and after twists and turns what was left became part of Mentor Graphics in 1999. Valid was folded into Cadence in 1991. Cadence tried and failed to buy MG in 2008. MG was finally bought by Siemens AG in 2016.
- lizknope 4y ago
  I started working in 1997 doing digital physical design. I had never heard the term "silicon compiler" before so I looked it up. https://en.wikipedia.org/wiki/Silicon_compiler https://en.wikipedia.org/wiki/Silicon_compiler Silicon compilation takes place in three major steps: Convert a hardware-description language such as Verilog or VHDL into logic (typically in the form of a "netlist"). Place equivalent logic gates on the IC. Silicon compilers typically use standard-cell libraries so that they do not have to worry about the actual integrated-circuit layout and can focus on the placement. Routing the standard cells together to form the desired logic. So this is basically what I do everyday but we just call it logic synthesis (Synopsys Design Compiler / Cadence Genus) and Place and Route in Cadence Innovus or Synopsys IC Compiler. We use Mentor Calibre for LVS/DRC. I've worked in serdes teams where there is a lot of custom analog design with manually sized transistors and custom layout in Virtuoso. I'm working on chips in 5nm that are over 20x20mm so it would be impossible to do those without all the automation and it is still tons of manual work. Some of my older coworkers told me about doing layout on transparencies and colored pencils in the early 1980's.
  - ncmncm 4y ago
    I have been out of that world for 30 years. The terminology has stabilized since, and the software has got overwhelmingly more sophisticated, and also (I hear) comically buggy. Comically if you are not obliged to rely on it. Maybe tragically, otherwise, with no expectation of improvement. Some of us remember Rubylith with conflicted fondness.

jka 4y ago

I wonder whether there has ever been an attempt to calculate the loss-in-value caused by acquisition-as-shutdown-mechanism. They probably frequently lead to competitive benefits (and increased market share / revenue) for the acquirer, but the discontinuation of products presumably leads to lost time, effort, and potentially money as the former customers of the product look for alternatives (in a diminished market). I'll beat my usual drum and mention that free and open source software can mitigate some of the risks (but not, for example, support availability) for a software-based product, similar to having an agreed source-code escrow provision with a vendor.

dahart 4y ago
> open source software can mitigate some of the risks Have you seen this work in practice, do you have any examples to share? It’s hard to take seriously at face value for two reasons: 1- generally speaking it might undermine the acquisition in the first place since acquirers and investors and boards tend to like private potentially patentable IP, or at the very least proprietary code. 2- More importantly using your software after an acquisition-as-shutdown to compete with the acquirer is almost certainly a recipe for legal trouble. This seems unlikely to get that far since the acquiring co probably would have vetted the software and also had the acquiree sign a non-compete. Either way, if the intent was to shutdown the software, and if the acquiree was paid for their business, there isn’t a good way to “mitigate the risks”, the deed is already done. If you want to avoid the risk of shutdown, don’t take the deal. When you do see open source software as having any ability to change that equation?
- jka 4y ago
  Sure - ZFS[1] is one example that springs to mind. Those acquirer-side incentives do seem rational (and to some extent traditional) in a business sense. The risk-mitigation I mentioned was from the perspective of users, not so much of the acquisition target (although it could reassure their employees to know that the time and effort they invested continues to provide value). [1] - https://en.wikipedia.org/wiki/ZFS https://en.wikipedia.org/wiki/ZFS
- carapace 4y ago

anticensor 4y ago

> Google's hiring system is so Byzantine that buying companies, bypassing it, might be their main recruiting method. Wrong. Google actually fires all former employees of acquired companies once a certain protection period in the acquisition agreement is over, unless they individually pass the tests applied to new employees.