Yeah, I've heard from someone implementing it that on an RV32I core (so not quite a RV32E, but pretty close), the area difference between implementing the compr

Yeah, I've heard from someone implementing it that on an RV32I core (so not quite a RV32E, but pretty close), the area difference between implementing the compressed instructions and not was about the same as 64 bytes of SRAM. There is a cross over point, but it's pretty damn low. Particularly when you weigh the reduced size of the code memory needed, it's almost always a no brainer.