4 ms·
Each job requires a tool that does it best, within some limits. To set a bit in GPIO: - on AVR, one assembly instruction, 2 bytes machine code, 1 CPU cycle (u
by nousermane 4y ago
Each job requires a tool that does it best, within some limits.
To set a bit in GPIO:
- on AVR, one assembly instruction, 2 bytes machine code, 1 CPU cycle (unless interrupts are enabled);
- on microcontroller-style ARM (Pi-pico), 2-4 assembly instructions, 8-20 bytes machine code (depending on compiler options), 4-12 CPU cycles. All numbers deterministic within the same build (unless code cache is cold, then 50+ cycles, and don't forget interrupts);
- on ARM+linux, hardcore mode: same as above + small, deterministic number of extra cycles since GPIO runs at slower clock than CPU. That assumes you go out of your way to reserve CPU core, set rt_prio for your task, etc...;
- on linux, via sysfs: who knows. 1000 CPU cycles is probably the lower bound, but each run is going to take different amount of time. On a busy system, some - as long as a few seconds.
- monocasa 4y agoThe pi-pico does have that cute PIO state machine though to baby sit GPIO and get single cycle granularity out of it.
- jjoonathan 4y agoYep, I suspect that will be the path forward. Same high level strategy, but integrated into a single package. It will be interesting to see if the babysitters remain state machines or if they grow into tiny little microcontrollers.
- monocasa 4y agoOr tiny little FPGAs connected to the GPIO lines would be neat too.
- wheelin 4y agoMany automotive MCUs have complexe timer coprocessors integrated for hard real time I/O purpose. Examples are GTM, eTPU and N2HET that I know about. Does the PIO work in the same way?