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There's a significant momentum behind CXL [1]. Samsung already announced a CXL DRAM module [2]. From where I sit, it's all but inevitable that this technology w

There's a significant momentum behind CXL [1]. Samsung already announced a CXL DRAM module [2]. From where I sit, it's all but inevitable that this technology will get broader adoption, at least with large CSPs. Its benefits are just too good to pass up. The extra latency is estimated to be no worse than a NUMA hop [3]. Many companies are already figuring out how to best deal with the more complex memory topologies that CXL will enable [4, 5]. But I'm biased (I work for Intel), so take what I say with a grain of salt. [1] - https://www.computeexpresslink.org/members https://www.computeexpresslink.org/members [2] - https://news.samsung.com/global/samsung-electronics-introduces-industrys-first-512gb-cxl-memory-module https://news.samsung.com/global/samsung-electronics-introduc... [3] - https://www.lenovoxperience.com/newsDetail/283yi044hzgcdv7snkrmmx9ovpq6aesmy9u9k7ai2648j7or https://www.lenovoxperience.com/newsDetail/283yi044hzgcdv7sn... [4] - https://arxiv.org/pdf/2203.00241.pdf https://arxiv.org/pdf/2203.00241.pdf [5] - https://arxiv.org/pdf/2206.02878.pdf https://arxiv.org/pdf/2206.02878.pdf

Lramseyer 4y ago
Well I'll be... Though the renderings indicate that this is a CXL controller connected to DRAMs on the back end. It makes sense, since the front end logic for CXL is die area intensive. This is basically an SSD without all of the complexity of wear leveling. > The extra latency is estimated to be no worse than a NUMA hop I was almost going to mention that in my previous comment and point out that this might be a thing in enterprise applications where SRAM is plentiful, but not likely to outright replace DDR in most consumer computing devices as the parent comment seemed to suggest.
- pbalcer 4y ago
  > This is basically an SSD without all of the complexity of wear leveling. With all the benefits of an enterprise SSD (EDSFF in most cases) form factor. And that's what data center folks want. > not likely to outright replace DDR in most consumer computing devices Right. I expect that CXL will initially be deployed as an internal transparent optimization for cloud providers and large data centers, with the latency and complexity (to an extent) hidden at hypervisor/orchestration layers. Some sophisticated software might have special support. Eventually we might get S3-like disaggregated memory services for cloud instances enabled by pooling (pure speculation on my part).
- jsmith45 4y ago
  The potential benefits of this may vary though depending on how the OS exposes things. For example, exposing this as a ram disk while possibly useful is not really optimal. Treating it more like NUMA ram, that simply lacks any cores where the memory is "local", could be more viable. The OS could be programmed to shuffle out memory that is not frequently used over to there, as a faster alternative to paging to disk, etc. Some new madvise calls to let apps mark regions as not latency critical giving the OS permission to move the memory over even if it is frequently accessed could also be interesting.

Lramseyer 4y ago

Well I'll be... Though the renderings indicate that this is a CXL controller connected to DRAMs on the back end. It makes sense, since the front end logic for CXL is die area intensive. This is basically an SSD without all of the complexity of wear leveling. > The extra latency is estimated to be no worse than a NUMA hop I was almost going to mention that in my previous comment and point out that this might be a thing in enterprise applications where SRAM is plentiful, but not likely to outright replace DDR in most consumer computing devices as the parent comment seemed to suggest.

pbalcer 4y ago
> This is basically an SSD without all of the complexity of wear leveling. With all the benefits of an enterprise SSD (EDSFF in most cases) form factor. And that's what data center folks want. > not likely to outright replace DDR in most consumer computing devices Right. I expect that CXL will initially be deployed as an internal transparent optimization for cloud providers and large data centers, with the latency and complexity (to an extent) hidden at hypervisor/orchestration layers. Some sophisticated software might have special support. Eventually we might get S3-like disaggregated memory services for cloud instances enabled by pooling (pure speculation on my part).
jsmith45 4y ago
The potential benefits of this may vary though depending on how the OS exposes things. For example, exposing this as a ram disk while possibly useful is not really optimal. Treating it more like NUMA ram, that simply lacks any cores where the memory is "local", could be more viable. The OS could be programmed to shuffle out memory that is not frequently used over to there, as a faster alternative to paging to disk, etc. Some new madvise calls to let apps mark regions as not latency critical giving the OS permission to move the memory over even if it is frequently accessed could also be interesting.