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So probably a really dumb question, but given that assembly has a limited number of operations and a limited number of registers, what are processors doing with

So probably a really dumb question, but given that assembly has a limited number of operations and a limited number of registers, what are processors doing with the ever growing number of transistors added to them? What is processed with billions of transistors that can't be done with thousands?

MasterIdiot 4y ago
Among other things - larger caches, more instructions, more cores and more busses in between them.
ithkuil 4y ago
1. Modern CPUs have a larger internal register file and dynamically remap the logical registers referenced by machine instructions into physical instructions. 2. Modern CPUs have a very complicated instruction reordering mechanism and data dependency analysis mechanism that allows CPUs to execute multiple instructions in parallel, when it's possible. 3. A lot of transistors are used for caches (instruction and data caches, and other kinds of buffers like the one used for branch prediction etc). 4. Even a single core has multiple copies of the execution units which allow to execute some instructions in parallel (see above).
teraflop 4y ago
It's not a dumb question, but it's so broad that it would take at least an entire textbook to fully answer it. Just off the top of my head, some possibilities are: * More cores * More numerous/powerful execution units that can do e.g. vectorized math * Architectural features such as virtualization and security defenses * Bigger and more flexible caches * Complex pipelining/out-of-order/speculation logic that allows more instructions to be executed (on average) per clock cycle * Special-purpose functional units that dramatically accelerate particular applications (e.g. AES encryption, video encoding/decoding) and are idle the rest of the time * Replacing "deep" networks of logic gates with equivalent "wider" ones, which occupy more die area but have a shorter critical path, enabling faster clock speeds
themadturk 4y ago
Multiple CPUs, Pipelining, multithreading, onboard graphics, Apple's efficiency and machine learning cores... and multiple CPU cores, as well. The code demonstrated in these examples is essentially executed as a single thread in a single core. Modern CPUs are faster not only because of faster clock speeds, but more CPU cores and peripheral stuff, like cache memory and more, on each chip. Packing the transistors closer together means there's less distance to travel between, for example, the CPU and the arithmetic logic unit, or between the CPU and the on-board cache memory. And I'm sure I've barely scratched the surface.
beachy 4y ago
The sibling comments cover the bases really well, but just in case it's not obvious, what you are thinking of as a relatively simple machine - with a limited range of operations and registers - is actually itself an abstraction. You see the machine executing a sequence of instructions, and that is exactly what happens - eventually. But behind the scenes, the goal of the hardware is to execute those instructions as quickly as possible. Since there's a limit to how fast silicon can work, the way to achieve this is via a number of tricks that effectively throw yet more circuitry at the problem, taking you from millions to billions of transistors. Just one of these tricks for example is caching. Instead of writing directly to memory (as it appears to your assembler code), the CPU actually writes data to the L1 cache, a smaller but much faster block of memory on the CPU itself. At a later time, the data can be transferred from the cache out to RAM. In fact a modern CPU will have caches feeding into caches - e.g. CPU feeds into the L1 cache, which itself feeds into the L2 cache, then into the L3 cache, and finally into RAM. At each step, the cache gets larger and slower - so while the L1 cache is measured in KB, the L3 cache in a modern CPU might be up to 64MB in size. You don't see any of this when you are writing assembler code. To all intents and purposes the caches are invisible to you. There are obscure instructions like CLFLUSH that provide very limited control of the cache but these are not typically something you'd use. It's easy to see how managing these caches enormously increases the circuitry in the chip, without any need for you, the assembler programmer, to even think about them. As other commenters have noted, other areas where extra circuitry is thrown at the problem include area is pipelining. In your mental model, the CPU is probably plodding along executing instructions one after another. In practice the CPU is aggressively trying to reorder those instructions and execute them in parallel as much as possible. This is an incredibly complex process, requiring enormous amounts of circuitry. TLDR; what you see as a relatively simple CPU instruction set is really an abstraction - behind the scenes is an enormously complex collection of moving parts that break your code down and try and execute it as quickly as possible.

MasterIdiot 4y ago

Among other things - larger caches, more instructions, more cores and more busses in between them.

ithkuil 4y ago

1. Modern CPUs have a larger internal register file and dynamically remap the logical registers referenced by machine instructions into physical instructions. 2. Modern CPUs have a very complicated instruction reordering mechanism and data dependency analysis mechanism that allows CPUs to execute multiple instructions in parallel, when it's possible. 3. A lot of transistors are used for caches (instruction and data caches, and other kinds of buffers like the one used for branch prediction etc). 4. Even a single core has multiple copies of the execution units which allow to execute some instructions in parallel (see above).

teraflop 4y ago

It's not a dumb question, but it's so broad that it would take at least an entire textbook to fully answer it. Just off the top of my head, some possibilities are: * More cores * More numerous/powerful execution units that can do e.g. vectorized math * Architectural features such as virtualization and security defenses * Bigger and more flexible caches * Complex pipelining/out-of-order/speculation logic that allows more instructions to be executed (on average) per clock cycle * Special-purpose functional units that dramatically accelerate particular applications (e.g. AES encryption, video encoding/decoding) and are idle the rest of the time * Replacing "deep" networks of logic gates with equivalent "wider" ones, which occupy more die area but have a shorter critical path, enabling faster clock speeds

themadturk 4y ago

Multiple CPUs, Pipelining, multithreading, onboard graphics, Apple's efficiency and machine learning cores... and multiple CPU cores, as well. The code demonstrated in these examples is essentially executed as a single thread in a single core. Modern CPUs are faster not only because of faster clock speeds, but more CPU cores and peripheral stuff, like cache memory and more, on each chip. Packing the transistors closer together means there's less distance to travel between, for example, the CPU and the arithmetic logic unit, or between the CPU and the on-board cache memory. And I'm sure I've barely scratched the surface.

beachy 4y ago

The sibling comments cover the bases really well, but just in case it's not obvious, what you are thinking of as a relatively simple machine - with a limited range of operations and registers - is actually itself an abstraction. You see the machine executing a sequence of instructions, and that is exactly what happens - eventually. But behind the scenes, the goal of the hardware is to execute those instructions as quickly as possible. Since there's a limit to how fast silicon can work, the way to achieve this is via a number of tricks that effectively throw yet more circuitry at the problem, taking you from millions to billions of transistors. Just one of these tricks for example is caching. Instead of writing directly to memory (as it appears to your assembler code), the CPU actually writes data to the L1 cache, a smaller but much faster block of memory on the CPU itself. At a later time, the data can be transferred from the cache out to RAM. In fact a modern CPU will have caches feeding into caches - e.g. CPU feeds into the L1 cache, which itself feeds into the L2 cache, then into the L3 cache, and finally into RAM. At each step, the cache gets larger and slower - so while the L1 cache is measured in KB, the L3 cache in a modern CPU might be up to 64MB in size. You don't see any of this when you are writing assembler code. To all intents and purposes the caches are invisible to you. There are obscure instructions like CLFLUSH that provide very limited control of the cache but these are not typically something you'd use. It's easy to see how managing these caches enormously increases the circuitry in the chip, without any need for you, the assembler programmer, to even think about them. As other commenters have noted, other areas where extra circuitry is thrown at the problem include area is pipelining. In your mental model, the CPU is probably plodding along executing instructions one after another. In practice the CPU is aggressively trying to reorder those instructions and execute them in parallel as much as possible. This is an incredibly complex process, requiring enormous amounts of circuitry. TLDR; what you see as a relatively simple CPU instruction set is really an abstraction - behind the scenes is an enormously complex collection of moving parts that break your code down and try and execute it as quickly as possible.