It has very few general-purpose registers (A and B accumulators, IX and SP indexes), and it was designed when few (if any) mainstream processors were pipelined.

It has very few general-purpose registers (A and B accumulators, IX and SP indexes), and it was designed when few (if any) mainstream processors were pipelined. Fewer addressing modes would mean more intermediate values to store, and more cycles spent in calculating their values. If you have plenty of registers and a pipelined processor with a decent bypass network to get intermediate results available earlier, then it makes sense to simplify the addressing modes (to increase frequency and/or shorten the pipeline). However, the 6800 had neither many registers nor a pipelined ALU.