The risk averse nature of the semiconductor industry comes from it's financial scale and speed. If there's a mistake, re-spinning the chip (even just the metal

The risk averse nature of the semiconductor industry comes from it's financial scale and speed. If there's a mistake, re-spinning the chip (even just the metal layer) is costly both in time and financially. No self respecting semiconductor company wants to be the guinea pig for an entirely new tool. That being said, better tools for design and verification would still win out since developer time is more valuable/scarce than computational time. However, hardware tends to differs from software in that the computational requirements for designing and verifying a chip design are far greater than the average product in the software industry. Literally everyone I know in my industry hates the current state of EDA tools, and fees like they're stuck in the past, yet most of them defend the use of Perforce over git, Cron over Jenkins, XML over JSON, TCL over Python, Cisco Any-connect over Tailscale, and running their remote terminals in a VNC session instead of using SSH like normal people. I feel like the pot is calling the kettle black here.