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Samsung expected to announce mass production of 3nm chip next week
- dvh 4y agoFor comparison, silicon photonics is at 1500nm
- jacquesm 4y agoWhat is the purpose of this comparison?
- Beltiras 4y agoThere are applications where silicon photonics outperforms semiconductor electronics. Imagine the performance you could get out of similarly sized optical gates.
- HPsquared 4y agoWouldn't the size be limited by the wavelength of light used in the chip? Visible light wavelength is a range approx. a few hundred nm.
- deleted 4y ago[deleted]
- Beltiras 4y agoYes, you are right. I didn't know that current tech is using 1550nm light. Wouldn't want to imagine the heat coming off the optical CPU using 2nm light. Yikes.
- jacquesm 4y agoImagination isn't what drives this, materials science is. This comparison as far as I can see is utterly meaningless, it is about as apples-to-oranges as it gets.
- mensetmanusman 4y agoThere are startups out of MIT like Ayer labs using 30 nm node tech to make grating couplers, but fundamentally if you are using light with a wavelength of 1500 nm, there is a limitation in how much it could possibly matter to go to single digit nms due to the nature of light.
- MobiusHorizons 4y agoDoes Samsung have any claims of how their 3nm compares to TSMC 5nm currently in released products? My understanding was that Samsung’s previous nodes have been less power efficient than the competition at similar performance, so I would guess TSMC 4nm would still be a strong competitor.
- YetAnotherNick 4y agoJudging solely by transistor density(not sure how meaningful is this metric), it is bit better than TSMC N4, but comparable. TSMC N5: 185.46 TSMC N4: 196.6 TSMC N3: 314.73 Samsung 5nm: 133.56–134.9 Samsung 4nm: 137–145.7 Samsung 3nm: 202.85 https://en.wikipedia.org/wiki/5_nm_process https://en.wikipedia.org/wiki/5_nm_process https://en.wikipedia.org/wiki/3_nm_process https://en.wikipedia.org/wiki/3_nm_process
- top_sigrid 4y agoThanks for pointing this out, but some units would do good ;)
- dmitrygr 4y agoI think that’s MTr/mm^2
- ncmncm 4y agoWe will need to start reporting transistors per square micron. But it is the same number. I drove past a Micron Technology building last month, and had to reflect on how many square microns a 6502 would take, nowadays. Not counting TTL drivers, looks like around 4x5 microns. An original ARM would fit in like 10x20 microns. Invisible either way.
- mdp2021 4y agoLet us not overlook: > TSMC, the world's largest contract chip manufacturer, said it will begin mass production of 3nm chips in the second half of the year Although to other very recent sources: > TSMC has detailed its chip development timeline at its 2022 TSMC Technology Symposium[: t]he Taiwan-based chipmaker is introducing 3nm chips in the second half of this year and will bring 2nm technology to the world stage in 2025 https://www.gsmarena.com/tsmcs_3nm_chips_coming_in_2023_going_2nm_in_2025-news-54710.php https://www.gsmarena.com/tsmcs_3nm_chips_coming_in_2023_goin...
- throwaway4good 4y agoWhen EUVL becomes cheap and abundant, how much of chip production is going to move to it? Is the chip in my coffee maker ever going to be made using EUVL?
- drlobster 4y agoNot sure EUV can ever become "cheap" as such, and not the DUV methods are so getting cheaper. The cheapo microcontrollers are likely made entirely with DUV (or longer wavelength) methods. It's only the certain layers that are printed with EUV. Typically these are the first one or two metal layers (connecting the individual transistors) and the vias between them.
- hunglee2 4y agogreat to see free market competition stimulating this innovation. More foundry's we have in the world, the less dependent we all might be on single supplier - should make the world a better and safer place
- oblio 4y agoBoth Samsung and TSMC are getting tons of subsidies from Taiwan, Japan, the US, etc., in order to keep or build factories in the respective countries. More like "free market competition with state intervention". Speaking of which, Europe needs to get moving. Europe badly needs local factories and ideally local companies building advanced chips.
- ChuckNorris89 4y agoWe have local name fabs in Europe but they are not this cutting edge. Yeah, Europe will again fall behind in tech, especially sine we're currently busy withering a war on our borders, rampant inflation, and an energy crysis. We have some local companies that are suppliers to the semi industry like Zeiss, Asml, Trumpf.
- mschuster91 4y agoIntel has already begun constructing a massive fab in East Germany, so (at least assuming Intel doesn't fall into yet another dud) there will be a cutting-edge chip production in Europe again.
- LargoLasskhyfv 4y agoI think this counts too: https://www.intel.ie/content/www/ie/en/company-overview/intel-in-ireland.html https://www.intel.ie/content/www/ie/en/company-overview/inte...
- ChuckNorris89 4y agoDon't think that's one of Intel's cutting edge fabs.
- nickcw 4y agoJust a reminder from: https://en.wikipedia.org/wiki/3_nm_process https://en.wikipedia.org/wiki/3_nm_process > The term "3 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. It is a commercial or marketing term used by individual microchip manufacturers to refer to a new, improved generation of silicon semiconductor chips in terms of increased transistor density (i.e. a higher degree of miniaturization), increased speed and reduced power consumption, However, there is no industry-wide agreement among different manufacturers about what numbers would define a 3 nm node. For example, TSMC has stated that its 3 nm FinFET chips will reduce power consumption by 25 to 30 percent at the same speed, increase speed by 10 to 15 percent at the same amount of power and increase transistor density by about 33 percent compared to its previous 5 nm FinFET chips. The same article states that transistor densities for Samsung 3nm will be 202.85 Million transistors per mm2 and for TSMC 314.73 Million transistors per mm2 so quite a big difference. If the transistors were 2D and square then that makes Samsung's 3nm transistors actually 70nm, and TSMC's 56nm according to my maths!
- usrusr 4y agoMy simplified layman's mental model is pixel resolution in cameras: back when we were limited only by the sensor, quadrupling megapixels would have allowed us to e.g. read a sign twice far away (ignoring noise/shake issues). Now that the resolution of the sensors usually exceeds that of the lense, more megapixels will still help us tease a little more information from the same optical projection (again, ignoring noise/shake), but those benefits are much smaller than they used to be. With chip process node "nanometers", I assume that "the other limit" (the role taken by the lens in the camera analogy) is the size required by transistors if we had infinite resolution. Lower "nanometers" will allow us to get closer to that hypothetical best, but the benefit will be smaller and smaller.
- redisman 4y agoI wonder how this naming scheme continues and why are they skipping over half the numbers given that this set will soon run to 0. 7nm - 5nm - 3nm - 1nm. What’s next?
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- GeekyBear 4y agoSamsung's big issue recently has been yield. >Samsung’s issues with yield are concerning. It’s said that the yield of the Qualcomm Snapdragon 8 Gen 1 manufactured by Samsung Foundry is 35%. What that simply means is that out of the 100 pieces that are manufactured, 65 are defective. The yield for Samsung’s own 4nm Exynos 2200 is shockingly said to be even lower than this. https://www.sammobile.com/news/samsungs-horrible-yield-qualcomm-give-tsmc-business/ https://www.sammobile.com/news/samsungs-horrible-yield-qualc...
- iasay 4y agoIt's actually slightly more worrying. The rate of improvement of the yield is poor as well unlike earlier processes. We're rapidly heading towards a dead end. Hopefully this will put commercial pressure on better computer science, algorithms and software efficiency.
- ncmncm 4y agoSamsung home appliances (washer, dryer, dishwasher) are also supposed to have grave reliability problems. Anyway, appliance repair people on YT say so. (Plus, LG refrigerators, maybe still.) (My experience is that Whirlpool/Maytag appliances now all have a gratuitous circuit board with parts that reliably burn up after warranty runs out, requiring a $100-300 replacement. In my washer, the top actually blew off of a LNK305 voltage converter, exposing the chip inside, along with several traces and various other parts.)
- throwawaylinux 4y agoThe most interesting part about this will be how GAA transistors perform. This is the first new transistor architecture since FinFET. It promises better performance on metrics such as leakage, drive currents, switching speeds, etc., and not just density (although they're all interrelated to some degree -- e.g., you could improve leakage by reducing density or switching speed).
- marcodiego 4y agoWouldn't it be a better metric to announce progress in transistor per square millimeter?
- MobiusHorizons 4y agoThe two most important budgets for a chip design are power and area. Transistor density is only one of the important metrics you would need to evaluate budgets on a given node. Smaller transistors are typically more power efficient at high frequencies, but small feature size makes it harder to prevent current leakage, and each node handles that to varying degrees of success. This is also a new physical layout of transistor (gate all around) compared to fin-fet previously, so we can expect those other calculations like speed and efficiency to work differently on this node.
- Bud 4y agoExcept this is Samsung, the most infamous benchmark-cheaters in the world, so their 3nm process has an actual feature size of...around an inch.